Issue with matching network design using LTspice and SmithV4.1

[YoungRF555]

Forgive me if I am overexplaining my issue I am very new to match design.

I am trying to match a highly inductive load and am restricted to L (Source-Cshunt-Cseries-Load) or InvL (Source-Cseries-Cshunt-Load) networks. I can make these networks easily with smithV4.1 but when I model them in LTspice I get wildly different results (off by ~60+j200 at most) . I am modeling the networks two ways and the error persists. The first is modeling the network to have the expected load and tuning to have the Zin get as close to 50+j0 as possible. The second way is modeling the load as 50ohm and tuning the Zin to as close to the complex conjugate of the load. I have tried rebuilding the networks on SmithV4.1 and LTspice many times as well as triple checking the AC analysis on LTspice. I can "tune" the network to show the Zin that I want buy my values are off by factor of 10 or 100. I have also simulated many matches in the past (L and InvL with mix of LC) and have had much better luck in getting a closer match initially. I am aware of the error that would occur solely due to the inaccuracy n mouse movements in SmithV4.1 but I feel the margin of error I'm receiving for these only capacitive matches is something more than that.

Any help or guidance in this matter would be greatly appreciated. If there is a more efficient or robust way to simulate matching networks please let me know.

EDIT0: .asc of the match is now attached

EDIT1: Solution was to use a resistor in series with reactive component to make complex impendence spice does not like complex values for resistors.

[RFDx]

How about showing where the problem is instead of describing it.

[Hamelec]

if you only have a highly inductive load without resistive part there is nothing to match to 50R except the losses of the L.. 

[iMo]

if you only have a highly inductive load without resistive part there is nothing to match to 50R except the losses of the L.. 

The losses in L are caused by the "resistive" part there in XL.
As recommended above, we communicate via schematics, or .asc files when talking stuff in the LTspice.

[YoungRF555]

Apologies I meant to attach my files. Thanks for the heads up

[YoungRF555]

.asc is posted now my apologies

[RoV]

LTSpice doesn't like a complex value for resistance. Strangely it doesn't complain, but if you use (in your example) R=2.2 ohm in series with L=610 nH (X~=52 ohm @ 13.56 MHz), you get close to 50 ohm at the source.

[YoungRF555]

That was exactly the issue, many thanks