Phase locking a YIG oscillator for a microwave synthesizer project

[EggertEnjoyer123]

I recently acquired a HP 86290A module which just needed a little bit of work to fix. I just had to replace a leaky capacitor and also repair all the traces that broke because of the electrolyte. (You can see the bodge on the orange board).

This module was part of an HP sweep oscillator which goes from 2 to 18 GHz. As you can see from the spectrum analyzer plot, the module works and is able to generate 10dBm. (There is a 30dB attenuator so mentally add 30dB).

I am not interested in the sweep part. Instead, I want to build a microwave synthesizer using this module. If you read the November 1977 HP journal and compare it with the March 1975 issue, you can see that HP's microwave synthesizers use the exact same RF components in the exact same way, and the only difference is the phase locking (and the attenuator).

I would like to build a phase locked loop in order to accomplish the same thing. There is a AUX OUT port on the back of the module which outputs a coupled signal from the YIG. From my SA measurements it is a bit under 0 dBm. This signal can be phase locked to a reference signal to do the same thing as a microwave synthesizer.

Anyways, I am looking for ideas on how to do the phase locking. My initial thought was to use a PLL IC like the ADF4156, but the problem is that the YIG oscillator has two tuning coils. One coil is for coarse tuning, and has a low bandwidth since it has a big iron core. The other coil (FM) is for fine tuning and has a significantly higher bandwidth thanks to being air cored. This would be a problem because the PLL IC has only one output and there would need to be some way to drive two. On the HP 86290A, all the coil drivers are already done for me and I just need to put a 0 - 10V signal into the tuning voltage wire in order to coarse tune the oscillator.

From reading the HP journal issue on the microwave synthesizer, it seems like the coarse tuning coil is connected to a DAC, and the PLL only touches the FM coil. I'm thinking of making a microwave sampler, which would allow me to downconvert the 2.0 to 6.2 GHz signal to a more manageable frequency (<100MHz). The coarse tuning will allow me to get within 100 MHz or so of the actual frequency. Some kind of feedback control where the microcontroller gets the frequency and updates the DAC could work to get the frequency within a few MHz of the desired frequency. Then I can probably use a low frequency PLL IC to power the FM coil. Is there a simpler way to do this?

[RFDx]

From reading the HP journal issue on the microwave synthesizer, it seems like the coarse tuning coil is connected to a DAC, and the PLL only touches the FM coil. I'm thinking of making a microwave sampler, which would allow me to downconvert the 2.0 to 6.2 GHz signal to a more manageable frequency (<100MHz). The coarse tuning will allow me to get within 100 MHz or so of the actual frequency. Some kind of feedback control where the microcontroller gets the frequency and updates the DAC could work to get the frequency within a few MHz of the desired frequency. Then I can probably use a low frequency PLL IC to power the FM coil. Is there a simpler way to do this?

I don't know of any simpler way to do it. A voltage controlled (DAC) current source for coarse tuning and a PLL that keeps phase/frequency in check by driving the FM-coil. I would use a normal, digital phase/frequency detector instead of a diode sampling bridge. Many PLL-chips this days support very high reference frequencies. The gain in the (analog) PLL filter probably needs some adjusting as the 2...6.2GHz frequency range is quite high. To calibrate the coarse tuning range you could monitor the unlock flag from the PLL and the PLL voltage itself. 

[LaserSteve]

Stellex PLL on Ebay can get you a locking board from 2-11 Ghz or more.

http://www.ke5fx.com/stellex.htm

chrome-extension://efaidnbmnnnibpcajpcglclefindmkaj/https://www.qsl.net/ct1dmk/Stellex_ctrl_by-ct1dmk.pdf

Or just copy the directional coupler, frequency divider, PLL portion, all common parts and a bit of PCB.

Stellex Yig, Stellex PLL, Stellex Synthesizer can be winning search words.

Well documented on the web, build only the parts you need. 



Steve

[David Hess]

What about taking the single tuning output and splitting it into two, with the coarse tune driven by the DC to low frequency part and the fine tune driven by the high frequency part?

[paul@yahrprobert.com]

I've recently finished a YIG synthesizer project using the ADF41513 chip at 10 GHz for my ham radio project.  I take the charge pump output, put it through the standard passive RC loop filter, then split it into a low frequency part and a high frequency part with two simple RC filters, with time constants of about .5 ms.  The low frequency part goes to an op-amp and NPN transistor wired as a feedback controlled current source to drive the YIG magnet (about .5 amps).  The high frequency part goes to a low noise transistor amp to drive the high frequency FM coil. Put plenty of pots in the circuit to adjust the gains and I get a very stable frequency with phase noise at least as good as my HP 83732 signal generator.
For the ADF41513 of course you need a stable reference, preferably up around 100 MHz.  I started with a Bliley OCXO I got off ebay but now I have a Stanford PRS10 Rubidium oscillator at 10 MHz feeding a homebrew pair of triplers to get a 90 MHz reference.
You can find similar circuits by looking in the diagrams of HP products like the E4407B spectrum analyzer or the 837xx signal generators.
I would question the idea of using the DAC to drive the low frequency coil.  If there is some offset error then you'd have to DC couple the high frequency coil driver and you might be asking it to pump substantial DC current through that small coil.
Oh and my YIGs are some Avantek models off of Ebay for about $100.  They put out +13 at least, great for driving my mixer.

[EggertEnjoyer123]

What about taking the single tuning output and splitting it into two, with the coarse tune driven by the DC to low frequency part and the fine tune driven by the high frequency part?

I was originally worried about the big disparity in tuning sensitivity causing issues. Of course you could amplify it by multiple times, but I thought that it would lead to the noise also being amplified a lot. It seems like this is a good idea though based on the comment from the other poster.

Oh and my YIGs are some Avantek models off of Ebay for about $100.

You can get them for much less at ham radio swap meets. I have 5 or 6 YIG oscillators that I bought for $5 each.

[David Hess]

What about taking the single tuning output and splitting it into two, with the coarse tune driven by the DC to low frequency part and the fine tune driven by the high frequency part?

I was originally worried about the big disparity in tuning sensitivity causing issues. Of course you could amplify it by multiple times, but I thought that it would lead to the noise also being amplified a lot. It seems like this is a good idea though based on the comment from the other poster.

Noise above the low frequency cutoff would be almost entirely controlled by the higher frequency control loop which will remove high frequency noise from the low frequency control loop.  This idea works for making low noise regulators and operational amplifiers as well.

The sensitivity of the two coils is different so the gain of each loop is adjusted to give a smooth transition.  When I have done this in the past, the low frequency loop used an integrator for frequency compensation and adjusting the gain had the same effect as adjusting the integrator's time constant, which then controlled the transition frequency between the two loops.  I adjusted the low frequency gain, adjusting the integrator's time constant, for lowest noise within the frequency range that I was interested in.

[EggertEnjoyer123]

Here's my schematic so far for the PLL. I decided to switch to using a TI part as it had more bits for the fractional parts.

I plan on using an OCXO for the frequency reference.'

Also, I saw a 8620B for sale for $20. It would be a lot cheaper and easier to use the power supply from that instead of designing my own.

[prutser]

I am about to do something similar, YTOs on E-bay are cheaper now than wideband PLL synthesizer ICs 
I Obtained a Watkins & Johnson YIG oscillator 8-10GHz. Did some initial testing to see how it behaves.
It is "power hungry" tuning coil requires about 420mA before it starts (approx. 7726 MHz) and about 1A to get 18GHz.  ( I am only able to measure frequencies up to 10GHz, so used 2 of them and a mixer to determine the output frequency above 10G)

With the FM coil max frequency change is approx 67MHz (150mA, more I didn't try because I do not have the specifications)

I was planning to control the tuning coil by a DAC with low noise opamp + power transistor or FET as V-I converter and to use the FM coil by a PLL (also using V-I converter)
Tuning coil sensitivity is approx. 17MHz/mA so noise should be kept to a minimum to avoid FM. 

As a PLL I intended to use a Stellex synthesizer PCB from E-Bay (still available for EU 29,-)
It contains an LMX-2931 PLL and a 12GHz prescaler (buying the parts is more expensive) The board seems designed for a PFD frequency of 250kHz and is fairly easy controllable. Reverse engineered schematics (without component values) are available.  I was able to get PLL lock (using a Stellex YIG, USB to SPI interface and some Python code) within a day. 

I like o use the YIG I have, from 8 to at least 17G. Not decided yet whether I will downmix or use some 18GHz prescaler.  Sampler also considered, but seems more 'tricky' 

[EggertEnjoyer123]

I fixed a lot of mistakes with my previous schematic.
Here's my updated one.

I'll probably try to have the board made next week.

Edit: I am stupid and I realized that the PLL chip can't take a 3.3V crystal input (it is limited to 3.3V - 0.5V). I will put a 2.5V regulator.

[EggertEnjoyer123]

I've gotten the boards back and soldered everything.

I had to make a few bodges to get everything working. I had issues with oscillating, so I removed the filters and I just passed everything straight to the FM input. I also disconnected the main tuning input to try to isolate the problem. Now I just turn the front panel knobs until it's close enough for the PLL to lock on.

So far I have been able to get it to phase lock correctly. However, there is a lot of phase noise. I have tried the following things:

1. Checking noise levels around the power supply. I used my HP voltmeter which has bandwidth up to 250kHz. The 3.3V has no measurable noise, the 5V has maybe 30uV RMS, the 20V has maybe 200uV noise and the -10V has 100uV noise. The op amps should have high enough PSRR to reject any noise on these rails though.

2. Running the VCP of the PLL IC off the 3.3V instead of 5V supply. The 3.3V has much lower noise because it goes through a good LDO.

3. Changing the loop filter to one with higher phase margin. The values shown on the schematic attached are the old values which have 40 degrees phase margin, but changing the phase margin to 70 degrees made no difference. The loop BW is still 30 kHz.

4. Measuring the residual AM on the output to make sure I'm not seeing AM modulation. I hooked up a detector to the output and I read 0.12V DC. I got an AC reading in the microvolts range.

I'm wondering if the phase noise could be due to the crystal I'm using, which is a cheapo 100MHz crystal from YXC. Here is the datasheet: https://mm.digikey.com/Volume0/opasdata/d220001/medias/docus/5344/YSO110TR.pdf
I also noticed that the S11 of the input sucked (it was >-1dB at 2GHz). Despite this, the divider inside the chip works. Using one of the multiplexed pins, I "broke out" the internal N divider and I measured it with an oscilloscope. It is at the correct frequency.

I disabled Fractional N in software, and I am using an integer N (42), along with a 100 MHz crystal to generate 4.2 GHz.

[RoV]

From your plot I would guess that the PLL is working hard to stabilize the frequency at low offset from the carrier, where the loop gain is very high due to the integral term, but doesn't manage to do the same at larger offsets. This makes me suspect that the current entering the main tuning coil may be noisy: remember that the tuning coil sensitivity is great, something like 50 mA / 1 GHz, so a 1 uA pp noise would cause a deviation of 20 kHz pp. The tuning coil current must be extremely clean.
Another source of noise are variable magnetic fields close to the YTO. Even if the YTO is shieded with mumetal, an average quality 50-60 Hz transformer at 20 cm from it can generate well detectable noise (I actually experienced this!).

[EggertEnjoyer123]

All the RF parts, YIG driver circuits, and power supplies are inside the HP instrument. Assuming they know what they're doing, everything should be good there. Though I guess it could be possible that some components might have gone out of spec.

I'll have to take apart the RF plugin sometime later and make sure there's nothing wrong there too. The HP people had a way to lower the noise on the tuning coil (which was connecting a 300uF capacitor across the main tuning coil), but I had to disable it with one of the switches because it would oscillate if I didn't. The lower frequency portion of the FM input gets fed to the main coil instead of the FM coil, and with the capacitor connected the loop gain got messed up and it started oscillating.