PolyPhase or N-Path Mixer

[R_G_B_]

Interesting how you applied this theory for your application. Analogue is indeed not dead. You can do some clever tricks with analogue signal processing.
Understanding correlation is a very useful tool.  Understanding the time and frequency domain and how they relate goes a long way.  You don't always need to rely
On a dedicated digital signal processor or even a digital signal processor to do digital signal processing.  Creative thinking and willingness to experiment with the unconvential is your friend. Surprised this discussion a short one.

[mawyatt]

When we developed a hand held real time Spectrum Analyzer in ~1980 based upon the Chirp Z algorithm we utilized Discrete Time Continuous Amplitude (DTCA) signal processing because DSP couldn't approach the power consumption levels required. This had the benefit of working in both domains, analog and digital, but without the need for ADCs and digital processors. So when the requirement to find narrow tones in real time scattered throughout the spectrum came up, and without the benefit of an ADC nor digital processor, we looked for unconventional means and discovered the earlier work on the commutating filter mentioned in another thread and referenced in Dr Nauta's video.

What we didn't realize for some time was this very DTCA filter could morph into a mixer with almost unbelievable characteristics.....and yield a single CMOS chip high performance fast frequency hopping receiver with few external components

As the old saying goes, "necessity is the mother of invention", and folks needed a different way to construct radios for some applications and the PPM provides one such means.

Agree about the lack of involvement, but this is a complex and deep dive topic, so many may not want to expend the effort, but glad a few like yourself have.

Best,

[RoGeorge]

Interesting discussion.

See this link this should help some better understand what's happening:
https://youtu.be/MP7m5OjXWUg

Thanks for the interesting post

Nice finding, that's a very clean explanation, indeed!   

The same video from the 'ISSCC Videos' channel was also posted on the 'icdutwentenl' channel
https://youtu.be/tYgc5mbdXMw

It seems like it is/was a workshop for the N-Path filter (video from Sept 2020), but I couldn't find the workshop:
https://youtu.be/OTxGakNCeeA



The N-Path filter is a very clever circuit.  While it feels like most of the aspects are understood by now, this looks like the kind of circuit full of surprises, and this is before even starting to experiment with it.

What intrigues me the most at the moment is the fact that I can change the cutting frequency of an RC filter without varying the R or the C value!   

Not sure if this is a well known thing, my guess is I am probably rediscovering the hot water here, but this alone can have a lot of applications.  Maybe it's just me who missed this obvious aspect, but as close as two weeks ago I would have bet my head on the validity of the fc = 1/(2*pi*R*C).  Would have never thought this can be changed with a switch.     My first prediction was a switched signal should have affect only the amplitude, and not the fc.

That is why I was saying last time that a switch is very different from a PWM source.

In fact, when I read in the pdf thesis linked in former posts that "The short exposure to the input signal divides the time constant by the duty cycle" and therefore it will change the fc, it was so obvious yet so unexpected that I thought it's a mistake, or  maybe I am reading it out of context.  I had to make a time domain LTspice simulation to convince myself:   




The 4 colors are the frequency response for 50%, 25%, 12.5% and 6,125% on time for the switch:


What exactly I was missing all this time?  What part of EE do I need to study more so to not be surprised about this change in fc?  Asking because the variable fc, or the change of tau in an RC cell, is stated in all the papers, yet no author seems to make a big deal out of it.

Another thing I don't understand is why the fc is much lower in that simulation?  I see about 400kHz (first blue plot), for the switch with 50% Dwell time, but my calculation for half of 1/(2*pi*R*C) with 1k and 100pF is 796kHz, about 2 times bigger than measured.   


Letting aside for a moment why does the formula and the simulation show different fc, the main question is why I don't see this switching principle exploited more often?  Or is it exploited, but I didn't noticed it?

What other related applications are out there that tune by fast switching instead of changing analog values?

[mawyatt]

Not sure about your simulations (haven't looked closely tho) but if you think of the switch in series with R, then the average current that flows is dependent on the switch duty cycle. For example if the switch duty cycle is 50% then the R resistor is only conducting current 1/2 the time, so the average current will be 1/2 the switch "ON" current and the resistor will look like a resistor of R/D, where D is the duty cycle. Of course this assumes a switch period much smaller than the RC time constant to get the averaging effect.

Best,

[mawyatt]

It seems like it is/was a workshop for the N-Path filter (video from Sept 2020), but I couldn't find the workshop:
https://youtu.be/OTxGakNCeeA

Another good find!!

This video shows how easy a commutating filter can be constructed with cheap readily available components, available to anyone interested.

Hopefully more folks will build a few of these commutating or N-Path filters to play around with Then maybe venture onto the PPM

Best,

[RoGeorge]

About the fc calculation, indeed 1/2, but I found it to be 1/4 when simulated, instead of 1/2.  I thought maybe this is because when the switch disconnects the source, nobody discharges the capacitor, but if I apply this idea then the other duty factors does not match with the simulation results.

I need to experiment with real circuits in order to understand more, right now I don't know if I'm seeing some simulation artifacts or there is an additional 1/2 in there.  Also I need to review the simulation (the one posted is from 31 of Dec, made in a hurry and didn't have time for it since then).

The fun part is this idea of switching (or pumping chunks of energy, or time bounder-ing a quantity) looks possible to apply not only for RC, and not only in EE, but in many, many other fields and applications.

If my intuition is correct, it should be possible to make for example a tunable Quartz crystal.   

[mawyatt]

Try this simple example:

Place a 1 ohm R in series with a switch, and a 1F C shunt to ground. Now connect a voltage source of 1V to the switch other side. Make this a 1 volt step that happens at 1 second. Force the switch to be ON all the time. Now run a Transient Analysis (TD) sim, the voltage across C will display as classic step response of simple 1st order RC LPF with a time constant of 1 second. Now clock the switch ON/OFF with a duty cycle of 50% at 1KHz and rerun the sim, the result will show a voltage across C that has a response similar to a 2 second RC time constant. Now change the duty cycle to 25% and rerun, you should see a result that resembles a 4 second time constant.

Best,

[T3sl4co1l]

What intrigues me the most at the moment is the fact that I can change the cutting frequency of an RC filter without varying the R or the C value!   

Not sure if this is a well known thing, my guess is I am probably rediscovering the hot water here, but this alone can have a lot of applications.  Maybe it's just me who missed this obvious aspect, but as close as two weeks ago I would have bet my head on the validity of the fc = 1/(2*pi*R*C).  Would have never thought this can be changed with a switch.     My first prediction was a switched signal should have affect only the amplitude, and not the fc.

Simple -- with no load resistance, the gain is always asymptotic 1.0 at DC.  With a load, gain will be PWM'd down.

Tim

[RoGeorge]

Try this simple example:
...

Made a similar test, and something wrong happens with the formula from the behavioral source.
V=5V*sin(2*pi*(1kHz +10MegHz*(time/maxt))*time)

My idea was that the variable 'time' will be in the range 0..10ms for a 10ms transient simulation ('maxt'=10ms).  That would make time/10ms to browse the range 0..1, and from here [0..1] multiplied with 10MHz and shifted with 1kHz would have made the frequency sweep from 1kHz to 10.001MHz.

However, V=Asin(2*pi*f*t) is about instantaneous values, and if I make f as a function of the same t, then the rate of change for f also matters.  Some sort of aliasing happens between the rate of change for f and the rate of change for t.

In the end, the behavioral source with that formula was not the same as a slow frequency sweep.  Some phase inversions happens, and if I look at the very last period of the B1, it is of 50ns (20 MHz) instead of the 100ns (10 MHz) I was trying to get.

[R_G_B_]

Here's another example using a simulation on n path filters

https://youtu.be/fHbkLNlac_w

[mawyatt]

I expect these filters have similar characteristics to the PPM, and in the video the phase switches are shown as symmetrical transmission gates utilizing PMOS and NMOS devices. We found, and confirmed by other researchers, for a given chip area the single NMOS device produces a lower NF (transmission loss), better TOI and don't require a complementary clock drive. We also found that triple well NMOS devices produce the best overall performance for the PolyPhase Mixer application, however many CMOS semiconductor processes don't support triple well NMOS.

Best,

[RoGeorge]

Some more docs, the Wireless Engineer May 1947 paper "Narrow Band Pass Filter Using Modulation" by N.F. Barber (see page 36 of 86) https://worldradiohistory.com/UK/Experimental-Wireless/40s/Wireless-Engineer-1947-05.pdf
(thanks to this nice archive of Experimenta Wireless / Wireless Engineer journals https://worldradiohistory.com/Experimental_Wireless.htm ).

Also, a 40 minutes video from two weeks ago, about the N-Path Filter seminar by Bram Nauta
https://youtu.be/L3wJ1XedpSo

Had a lot of fun so far studying the theory, quite vast I would say for such a simple circuit.  Still learning.

Did some experiments (in the kHz range) with a CMOS analog mux/demux on a breadboard, and saved some oscilloscope printscreens.

However, while reading and experimenting, I think I found something new that could significantly improve the circuit.  Looks like it should work (on paper), and can hardly wait to experiment with this new idea on a breadboard (in the MHz range).   

[R_G_B_]

Be interesting to see what you have found

[OwO]

Is there any chance this could be implemented using LNB mixer FETs like the NE3503M04? It has gain to 12GHz so I think it may work in switching mode up to 1GHz. There's about 0.3pF capacitance gate to channel. I will have to do some experiments...

[SuperFungus]

Isn't the problem of generating N accurately phased and duty cycle aligned clocks each at N times the desired fundamental a much bigger problem than finding a fast enough fet?

[OwO]

I was thinking of using a LVDS serializer IC to generate the polyphase clocks, e.g. MS90C385B but it's a 7:1 serializer so that means using 7 phases rather than 8. It's a 1000Mb/s serializer so it would be able to do up to 140MHz.

Some more ideas: if the capacitor on each phase is replaced with a LC tank, the mixer input impedance would peak at two frequencies f_lo + f and f_lo - f. But if delay lines and buffer amplifiers are added between each phase, it can force one "direction of rotation" of the "standing wave" on the baseband phases, and possibly act like an image reject mixer rather than a direct conversion mixer. The problem with the direct conversion approach is that it converts signals near the center frequency to DC or near DC, and any gain stage after the mixer will have 1/f noise. So for narrowband receivers you won't be able to get a low noise figure, sure the mixer has low NF but whatever follows must amplify a near DC signal and will have a much higher NF. That's why I still look for high IF approaches rather than direct conversion.

[mawyatt]

Is there any chance this could be implemented using LNB mixer FETs like the NE3503M04? It has gain to 12GHz so I think it may work in switching mode up to 1GHz. There's about 0.3pF capacitance gate to channel. I will have to do some experiments...

Any FET should work but simple large W/L NMOS produces the best results. CMOS NMOS devices in a triple well process where you can access the channel, well and substrate individually produces the best results. 3rd (odd) order non-linearity is the limiting factor and these type FETs produce the best results. We did some detailed analysis and experimentation over 10 years ago that showed NMOS outperformed  any other semiconductor devices including all the much praised 3/5 compound devices.

Best,

[mawyatt]

I was thinking of using a LVDS serializer IC to generate the polyphase clocks, e.g. MS90C385B but it's a 7:1 serializer so that means using 7 phases rather than 8. It's a 1000Mb/s serializer so it would be able to do up to 140MHz.

Some more ideas: if the capacitor on each phase is replaced with a LC tank, the mixer input impedance would peak at two frequencies f_lo + f and f_lo - f. But if delay lines and buffer amplifiers are added between each phase, it can force one "direction of rotation" of the "standing wave" on the baseband phases, and possibly act like an image reject mixer rather than a direct conversion mixer. The problem with the direct conversion approach is that it converts signals near the center frequency to DC or near DC, and any gain stage after the mixer will have 1/f noise. So for narrowband receivers you won't be able to get a low noise figure, sure the mixer has low NF but whatever follows must amplify a near DC signal and will have a much higher NF. That's why I still look for high IF approaches rather than direct conversion.

There were a number of papers beginning around ~2011 on using more complex functions than simple shunt caps to produce different results as "seen" from the antenna, I reviewed a USC PhD student paper than won the best student paper of the IEEE ISSCC way back that addressed various quadratic functions at baseband. These were RC and trans-impedance amplifier implemented quadratic functions on each phase allowing full integration on the chip. Using inductors would require N inductors operating at baseband, thus high values, and not integratabtle (everything we did was chip related), but might yield some interesting possibilities for non-chip implementation. To achieve the high input TOI the baseband function must "look" like a low impedance at the LO frequency, thus the shunt C approach and a "Pi" type capacitive input LC filter considered.

To move the information away from zero IF (LO center), you might consider a low IF approach where the information is at an offset frequency. If the information is FSK type, then a bandpass function at baseband would produce a double +- two peak response away from the LO center (this was done long ago for a "ring tone receiver" where the signal transitioned between leading and lagging I and Q at baseband). Another use of the PPM was to implement a quickly tunable notch filter to suppress an interferer, and many other adaptations which I can't discuss.



This is a fascinating circuit can lead to many different directions and adaptations, good to see more interest from folks.

Best,

[mawyatt]

Isn't the problem of generating N accurately phased and duty cycle aligned clocks each at N times the desired fundamental a much bigger problem than finding a fast enough fet?

Actually this isn't much of a problem since fast logic is available even in discrete form, and the PPM is not very sensitive to phase inaccuracy. Since the PPM input clock is N times the LO center frequency, the logic must operate with a max clock rate of N*LO max frequency. In the original works one concern was what was called "shoot thru current" where if the clock phases had a phase overlap this would momentarily shunt two adjacent phases together and cause additional disturbance at the antenna port (we were concerned about antenna LO leakage in some applications).

Dr. Andrews (author of original IEEE papers referenced from Cornell) proposed an elegant solution where each even and odd clock phase were split to create an even antenna port and an odd antenna port. These ports were then linked to the input antenna port by 2 small on-chip inductors. Since the "shoot thru current" is very narrow (~picoseconds) and always occurs from odd > even or even > odd clock phasing, the inductors isolate the even and odd switches and suppress the shoot thru current which would flow between the even and odd switch sets if phase overlap was happening.

Best,

[dmendesf]

This made me remember the attached paper from 1981 (in Portuguese, unfortunatelly). It describes a lockin amplifier made with a very similar architecture (capacitors and switches).

[mawyatt]

While posting on another thread recalled a receiver concept based upon the PolyPhase Mixer (PPM) that hadn't been discussed, this dates back to ~2005 so somewhat from memory!!

The receiver was called Ring Tone Receiver (RTR) after the old land line telephone Ring Tone which indicated someone is calling. The receiver was a combination of the old pager narrow band FSK architectures blended with a new twist the PolyPhase Mixer forming a new different style low power wide-band frequency hopping receiver.

The concept was targeted for applications where battery power consumption and size were paramount, so everything was focused on power consumption and size minimization.

The RTR utilized the Direct Down conversion to I and Q baseband feature of the PPM in a Mixer First (no LNA) receiver architecture but still achieved a high sensitivity. This was due to the very low PPM inherent Noise Figure, and good out of band rejection also due the unique properties of the PPM. Baseband I and Q were first RC passive filtered (for antenna port narrowband impedance matching) then active filtered with gain and low bandwidth around the +- FSK deviations. After active filtering the I and Q signals were limited and used as clock and data in a simple self clocked logic setup which would indicate if "I" preceded "Q" or "Q" preceded "I" as digital data bits. The self clocking serial data stream was simply compared to a specific code to identify the required action, which included activating a brief return transmitter acknowledge burst and/or activating a high data receiver to process much more data and such. The RTR was also quite frequency agile (due to the unique PPM properties) and could bounce multiple decades to avoid jamming (intentional or not).

Anyway, thought some folks might be interesting in this somewhat unique PPM based receiver concept!!

Best,