Hello

I'm attempting to home-build a receiver for the weather sats; I've had success with the analog NOAA transmissions, and would like to try the digital METEORs. To make things harder, I'm trying to do zero-if, so I need quadrature signals at ~137MHz, with tuning range of around 1MHz. The purpose of the project is to learn, so ready-made 50 cent single-chip solutions are out.
I've built the oscillator and quadrature generators using LVC U04 unbuffered inverters. It oscillates and tunes, but the noise performance is...

The circuit has two inverters making up a differential oscillator against an LC tank, feeding the phase-shift network, and the remaining four inverters buffering the quadrature signals and driving the mixers. The tank is made of a PCB coil with Q around 80, measured off-circuit by parallel-tuning it to operating frequency, series-matching to around 50ohms, measuring the impedance using NanoVNA and reversing the math. Tuning is done by two 1SV304 varactors, with tuning voltages between 1V and 3V (driven with some filtering from microcontroller's DAC).
The power supply is USB -> ferrite -> PTC -> 10uF (0805, good) -> 3.3V fixed stabilizer -> 10uF (0805, good) -> 2V stabilizer -> 1uF cap (0603 crap) -> ferrite -> 100nF filter cap -> chip.
In the department of things that work, we've got the quadrature network and the frequency meter D-flip-flop.

I've attempted to characterize the inverters a bit. The first problem is that they oscillate with only a resistor between the output and the input, consistent with a stray capacitance of around 0.5pF. I can easily see how that could be distributed throughout the layout, however I do not understand, how does it get the necessary phase shift; a single pole RC would only give it 90deg, so there should be plenty phase margin to avoid suprious modes like that.
This phenomenon does not go away until I reduce the biasing resistor down to 3.3k, which is how the oscillator is built. Thankfully, it also does not occur when driving the gate properly with a VNA. That way, I measured input impedance of around 45ohm + 7pF series, and a signal delay of 1.5ns. The datasheet quotes delay of 2ns typical at 2V, so that's good, except it's also almost 90* phase shift at 137MHz...

I also happily assumed an output impedance of 50ohm, and set up the coupling to the tank such that it's Q is reduced by half, and half the energy is dissipated in the tank, and half in the inverter input. Not sure this is correct though; when I looked up how the ICs are built, it seems they just have the LC tank slapped in the mosftet drains, no impedance matching or anything. They also don't get the helpful ESD protection resistors and diodes on their on-chip transistors...
Any pointers how to improve this are much appreciated. I understand the inverters may not be made for this kind of operation, but I feel they could be doing much better than they are now

Alternatively, I could go for transistor-level design, but then I feel I'd need at least a matched pair good for RF, and they kind-of don't exist...
Thanks a lot!