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12 bit Keysight... when?

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David Hess:

--- Quote from: Wolfgang on January 18, 2024, 11:27:39 am ---
--- Quote from: David Hess on January 18, 2024, 01:22:23 am ---
--- Quote from: Wolfgang on January 17, 2024, 08:45:43 pm ---- There are never more bits than an ADC can provide. Everything else is done by boxcar averaging and oversampling. While this can reduce noise, it will only make the inherent nonlinearities of the ADC more visible  >:D
These nonlinearities create spikes in the spectrum, automatically reducing dynamic range and also the resulting ENOB.
--- End quote ---

Nothing prevents having a converter with greater linearity than its resolution will support, but they are rare and except as describes below, I am not aware of any fast ones.

Modern fast ADCs all seem to be pipelined subranging types with 3 or 4 stages in series, with the earlier stages having a linearity much better than their low 3 to 5 bit resolution will support because it directly affects the later stages.  Error correction then discards some of the generated bits to produce the specified resolution at the interface.  Multiples of these subranging converters are interleaved for even higher sample rates and their self calibration encompasses this as well.
--- End quote ---

Agreed, but none of these tricks can be used in scope front ends with high sampling speeds. The "naked" linearity is what counts there, and there seems to be no way around that, AFAIK.
--- End quote ---

Which tricks are you referring to?  Modern subranging ADCs work exactly like I described from 100s to 1000s of millions of samples per second.  They use the extra bits generated in each stage to improve linearity and remove missing codes (1), and then use a separate self calibration step to interleave multiple converters for even higher sample rates.  And this is all found in the cheapest DSOs today!  How amazing is that?

(1) Missing codes are produced by a DNL (differential non-linearity) greater than 1.


--- Quote from: nctnico on January 18, 2024, 12:38:56 pm ---I agree. A light goes on saying what you see is not what you got. And then???  :)  IMHO peak-detect is a much more useful feature to prevent aliasing. At least you can see the extremes of the signal.
--- End quote ---

Back then peak detection was the exception rather than the rule because the required high speed logic was not trivial to implement.  It was very quickly moved to high speed custom logic.

Wolfgang:
Regardless of the way how ADCs do it, the remaining nonlinearities lead to ENOB reduction. Show me a single piece of ADC hardware that really achieved more bits that the ADC at RF speeds.

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