TVS diode likely won't do anything: there are few available with nominal voltage below 5V (which clamps at 8-10V, useless here), and they all clamp at the same level anyway because low voltage zeners simply have softer curves and by the time you get into surge currents, they're dropping the same voltage.
We aren't necessarily talking surge currents here -- this isn't induced lightning or capacitive discharge -- so the clamping voltages may be more friendly. But it still seems unlikely to work out -- there's just not enough precision available, too much slop between nominal voltage (where the TVS is drawing leakage current, some uA) and breakdown voltage (where the TVS is drawing noticeable current, some mA).
There are better devices, like the snapback diode which offers low dynamic resistance (= flat voltage drop) at low breakdown voltages (2-5V). But I don't think you can get snapback diodes in high power ratings (and they're hard to find by themselves, as it is), so those are out.
That leaves something less TVS-ey but more closely tuned to the application; a shunt regulator for example.
You don't want a crowbar, because that latches and shorts out the supply.
If the problem is supply dynamics, this is a very good solution --
It's not uncommon to see an active pulldown (i.e. resistive load) that fires on load release on some supplies. I have seen this on crappy buck regulators that are running in voltage mode and used in USB applications where this overshoot is also a major issue. There are a couple ways to achieve this, triggering it on voltage is probably not fast enough and you would need to trigger it on large negative di/dt and simply fire it for a fixed duration of time.
If you don't care about efficiency, a dumb load resistor (on all the time, no switch) will do. If it's dynamics, it might only need to be an ampere or a few.
If you do care, and you have the motor control signal is available, then you can simply invert that signal, run it to a MOSFET with a C+R so it turns on fast then slowly times out, and use that to switch a load resistor.
This could be described as a monostable timer, but beware with digital analogies: using a timer to drive the MOSFET, it would turn off suddenly, so you need to worry about the turn-off overshoot from that, which needs another timer and FET, which needs..... So an analog hack like this should be alright. Mind, the MOSFET needs to be rated for whatever power it dissipates as it comes out of saturation.
If you don't have the control signal, you're just as well off using a shunt regulator; sensing supply ramp rate I think would be a bit dicey (but is possible). For this, use a TLV431 shunt regulator, boosted with a logic-level PMOS. The connection will be:
- Sense voltage divider: resistor from +V to REF, resistor from REF to GND. Can put an R+C in parallel with the top resistor to give some derivative sensitivity.
- Regulator: A to GND, REF to divider, K to PMOS gate. Pullup resistor from +V to K, say 1k or so.
- PMOS: source to +V, gate to regulator K, drain to GND. Optional: resistor in series with drain, to limit worst-case current draw to safe levels.
Divider resistor values can be typically 10-100k. Set the ratio such that 1.24V (Vref) is reached somewhere between +V(nominal max) and +V(the other stuff blows up). So uh, 4.5-5V in this case I guess?
Use a generously sized PMOS. It's not clear offhand how much energy this overshoot contains (or will contain once clamped), but it can be estimated from waveforms. Energy handling roughly tracks chip (die) and package size. So shop in terms of, say, SOT-89, SOT-223 or PSON-8 if the energy is small, or PDSO-8 or DPAK for the next size up, or D2PAK, or larger still (D3PAK, TO-247, or if more is needed, consider paralleling multiple), as needed.
Note: PMOS have generally poorer performance than NMOS, but that's actually somewhat helpful in this case as you need a bigger die for the same ratings, and that extra die area means more energy dissipation!
Note that the PMOS greatly increases the current gain of the TLV431, and it already has a lot of gain so that oscillation can easily show up. If this is a problem, some negative feedback can be arranged. An example would be, use the series drain resistor, but a small value (some mΩ), and connect the regulator's A there instead of to GND. This way, as current rises, the (Vref - Va) voltage seen by the TLV431 falls, reducing its gain while including the PMOS in that loop.
(The TLV431 could also be boosted by an NMOS but I think it would be harder to stabilize; the PMOS has the advantage that it's a source follower configuration, so its voltage gain at least is low. A PNP could also be used, but these are pretty big in the current ratings we're talking here.)
Tim
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