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RD JDS6600 25MHz 2-Channel DDS AW Function Signal Generator
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Kleinstein:
Form the picture it looks like the DAC is not a pure R2R chain, but more like using thermometer style for the upper bits. So maybe someone confuses the 14 I/O pins used for control with a 14 bit resolution. At least the DAC seems to work reasonably well as 11 Bit this way.

The DAC type does not have direct influence on the noise with small signals. The waveform should be generated at constant amplitude and only the following multiplier and attenuators reduce the amplitude if needed.
qq354813374:
R2R resistor network to do out of the signal generator and DAC out of the signal generator to produce the waveform is completely different, if the same, the production of DAC manufacturers do not need to exist,
Directly with a few resistance can produce a DAC, digital signals and analog signals if not isolated, the noise can not be eliminated, there is, FPGA I / O port drive capacity is limited, not every I / O The current generated by the mouth will be exactly the same, which is the reason for the instability of the waveform, 11bit and 14bit waveform generated by a great difference, I do not know if you have not carefully observed, 14 I / O port can not say that the resolution of 14bit , He also has a large number of data stored with the waveform has a great relationship.
qq354813374:

--- Quote from: Kleinstein on July 21, 2017, 07:47:02 am ---Form the picture it looks like the DAC is not a pure R2R chain, but more like using thermometer style for the upper bits. So maybe someone confuses the 14 I/O pins used for control with a 14 bit resolution. At least the DAC seems to work reasonably well as 11 Bit this way.

The DAC type does not have direct influence on the noise with small signals. The waveform should be generated at constant amplitude and only the following multiplier and attenuators reduce the amplitude if needed.

--- End quote ---

You can look at the delicate degree of 14bit waveform
Kleinstein:
A special DAC chip is generally better than using just a resistor chain at the FPGA output. Most DACs do not offer that much of isolation between the digital side and analog output. So noise is in both cases a question of a good layout. This is still a low cost generator - so the cheap resistor ladder DAC is a kind of compromise.

The failure is to label it 14 Bit resolution if they actually only get 11 Bits.

The Resistor chain looks like 8 Bit R2R and 14 or 15 resistors thermometer style. So at best they could get something like 12 Bit resolution. Still I am surprised how good it seemed to work. If not careful, even at 8 Bits R2R one can get significant errors. One sees that with other low cost generators that call for 8 or 12 Bit resolution and only deliver 6-7.  With an actual 11 Bit resolution it is already a big step forward.

Using true 14 or maybe just 12 Bit DACs is a cost factor - though they might save on the amplitude control this way.
pantelei4:

--- Quote from: qq354813374 on July 21, 2017, 08:16:07 am ---You can look at the delicate degree of 14bit waveform

--- End quote ---
Do you have a FY6600?
It can amplitude and frequency modulation and has a sync output?
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