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Arbitrary Waveform Generator with fast edges in ARB mode
joeqsmith:
Sorry you lost me on these 80MHz hardware timers.
nctnico:
IMHO a pattern generator fits the requirements much better compared to an AWG. And a pattern generator typically also has better software features to create pulse patterns. Maybe the Analog discovery 2 is an option. This has a 100Ms/s digital pattern generator.
_pat_:
alm,
A Schmitt trigger would indeed change the edges into very fast types, but it suffers from the same fundamental issue that I already have : when the slope is slow, then you are at the mercy of noise, which itself will introduce jitter into the produced signal. Let's say you have a 2.5V threshold, but there are a few mV of noise on the signal, then any timing issues in the system under test may be drowned in the noise generated by the slowly rising voltage plus voltage noise compared to the the threshold. When the edge is fast, this is less of an issue. To take an example, if you had 1V pk/pk of noise on a 5V pk/pk signal (trying to be really cruel here) but a 12ns rise time, the voltage noise would correspond to 1/5 of 12ns, or 2.4ns. But if the edge was 122us then the timing jitter introduced by the same voltage noise would be 1/5 of 122us or 24400ns. If you want to check the timing of a generated edge against a reference edge to a precision of 12.5ns, then you don't need the reference drowning in thousands of nanoseconds of noise induced timing jitter. Hope that explains why I prefer to use a fast edge from a precise source.
Joe,
The 80MHz timers are in the system under test / development, rather than the Wavegen. If I want to check that an edge generated by the system under test is precisely 1.00000ms after a reference edge, then the jitter on that reference edge needs to be small. There can (and will) be differences between the trigger points in the DSO threshold cct and the system's own comparators. The smallest error that could occur is 1 clock cycle (12.5ns, and of course if is is not out at all, then it isn't an error... ie you can't really have an "error" of 0), of course larger errors are also possible (multiples of clock cycles). Hope this makes sense. Additionally, how do you reliably trigger the scope when you have a reference edge with a reference rise time of 122us but a signal rise time in the tens of nanoseconds.... your reference waveform, once zoomed in so you can accurately measure the generated waveform, will be to all intents and purposes, flat rather than a defined edge.
nctnico,
You're most definitely right that a pattern generator would suit this one very specific task much better than an AWG. That being said, it should clearly be possible to generate a sensible pattern with an AWG, and that will likely be subject to the same jitter that the Analog Discovery board would have, BUT that jitter would still be very much smaller than that from the interpolated slope of the DG1022Z.
I've had a chance to have a look at the Siglent software as well now, and it does also allow random-length waveforms to be created for the SDG2000Z series (though it does have some fixed-length options too).
I am cautiously optimistic at this point that either the Rigol DG2052 or the Siglent SDG2042Z will indeed be capable of generating fast (DDS-esque) edges rather than interpolated (point-to-point-esque) edges. I should soon have units to try and would be happy to report whether or not they can do this.
The advantage, if it is possible (and there's no good reason it *cannot* be, it's only a question of time and effort on the part of the engineers in the test equipment companies), is that the AWG will also be able to simulate more "normal" signals, such as VR sensor outputs, without needing to have a separate piece of equipment.
At some point I should have a closer look at the internal architecture of the Keysight 33500B series, they've done something quite trick to keep the jitter waaaaay down, and I just can't see how you can get there with a fixed sample rate DDS type system....
Cheers,
Pat.
2N3055:
@_PAT_
If you can borrow units to try out, that is best option.... Shout if you need help..
joeqsmith:
So you are simulating your cam/crank signals to your test device which output some pulses relative to those cam/crank signals. Pretty much what I am doing in these videos with the same card. The FPGA is measuring the fuel injection and ignition times, where they start and end. No scope is used. In my case, I want to use this information to close the loop. All pretty common for HIL testing.
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