Thanks. You seem to be remarkably knowledgeable. Do you work in the field of oscilloscope manufacturing?
I never have, but I have studied oscilloscope design for years, and am considering doing a similar project based on the Tektronix 2232.
With digital ones the problem is that you need to have 1 amplifier (at least for each channel) and one thing sampling it (the ADC). This is because if you had 2 and switched between them (say taking it in turns) they'd be slightly different in gain and sampling. We often don't expect channels to be exactly the same so you can get away with it but still.
The Tektronix 2230 and its predecessor, the 468, use a single digitizer for two channels with analog channel switching without any problems. The 2230 even weirdly supports chop or alternate mode when operating as a digital storage oscilloscope. Of course it would be silly to design a DSO this way today, and the 2232 which replaced the 2230 uses one digitizer per channel.
Most DSOs even now use analog channel switching to support more than one channel per digitizer, or more than one digitizer per channel, but it is done internally as part of the ADC. This has been done for a long time to support higher sampling rates when fewer channels are in use. It is not difficult to do, but is an unneeded complication.
A low sampling rate sampling oscilloscope could be made for bandwidths above 1 GHz but that entails several other design disciplines and is less generally useful.
Correct. Take equivalent time sampling, but for that to work you need a reliable fine scaled delay, or more useful for spectrum analysis a heterodyne mixer to bring your signal down in frequency. But these require a lot of additional electronics to make it work.
I was thinking in terms of a sampler and the timing circuits. Neither are a trivial exercise at GHz bandwidths and picosecond resolution.
I have been looking into the requirements to design a modern "sampling DSO" based on the random sampling capability of the Tektronix 7T11. This would combine 4+ GHz sampling bandwidth with conventional operation from the user's perspective without a delay line.
Last year I figured there should be standard interface ADCs and processors to allow for a high sample rate design without an FPGA or custom logic, and there are, but they are incredibly expensive.
You mean the FMC based systems?
I do not remember if that was it, but there is a standard for high speed ADC interfacing and I did a search for ARM microcontrollers which support it. The cost of the ADC and microcontroller were much higher than the cost of a more conventional ADC and microcontroller and an FPGA to interface them.
Well most likely money. High speed ADC's are expensive and using two that are capable of half the speed might cost way less than the single high speed one.
There are plenty of reasonably priced sampling ADCs now that are fast enough to make a useful DSO.
Delay isn't too much of a problem: see the very simple circuits in the Tektronix 1502 TDR.
A TDR has the advantage of operating synchronously and generating its own trigger. A sequential sampling oscilloscope has two triggers, one for the external signal and one for the sampling strobe. A random sampling oscilloscope in addition has to measure positive and negative delay, and includes a rate generator.
Triggering from the signal is more challenging. The Tek 1502 avoids that by having an, ahem, external trigger that is generated internally 
In most cases the triggering does not need to have as high a bandwidth as the input signal. What does matter however is trigger noise which requires careful design to minimize. The required performance was easier when tunnel diodes were available, but there are some modern comparators which are good enough. What is missing now however are fast PNP transistors.