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| Mechatrommer:
--- Quote from: tautech on October 25, 2022, 08:34:53 am --- --- Quote from: pcprogrammer on October 25, 2022, 08:19:14 am --- --- Quote from: tautech on October 25, 2022, 08:12:12 am ---Of course they do. Why else would their sampling capability be listed in every datasheet in GSa/s ? --- End quote --- Read David his post. The way I read it, is that according to him sampling is charging a capacitor with an analog value, not the turning it into a digital value. It is semantics. --- End quote --- I did also Mech's, rob77's and tggzzz's earlier all with some amusement. But you just can't get away from facts, a DSO samples.....fast ! --- End quote --- to be pedantic, my tongue can sample every food in restaurant and later pick which one i like, so i have a "sampling" tongue. a doctor will sample blood from various people to know where covid originated, so we have sampling doctor etc etc... albeit links are provided earlier from Tektronix and Keysight, some people still failed to read they generalized the term "sampling oscilloscope" as either 2 classes of equivalent or random sampling (or mix) where BW>>sampling rate.. and the other larger class is what we know "digital storage scope" (heck who are so pedantic to type all those?) or DSO as general purpose scope where sampling rate > 2 x BW. even analog scope will sample something into the CRT, so will it make it a "sampling scope"? its semantic of the same thing but different term or vice versa, some want to narrow them into classes and some still want to generalized for all classes as one. so looking at the topic... lets be more pedantic... |
| pcprogrammer:
--- Quote from: gf on October 25, 2022, 09:00:03 am ---Virtualy any ADC does. Continuous-time sigma-delta ADCs are the only exception i'm aware of. --- End quote --- A sigma delta converter is in itself a kind of sample and hold device. It keeps track of the input signal and checks if it goes up or down on the next clock. A flash ADC might not need a sample and hold because it uses many comparetors to make up the output bits, so clocking just the outputs might do well. |
| tggzzz:
--- Quote from: pcprogrammer on October 25, 2022, 08:56:27 am ---And what he, and me too, wonders about how this works for a high speed ADC. Does it use a sample and hold circuit or not. --- End quote --- There are many many types of ADC. One type is a flash converter. An 8 bit flash converter contains 256 analogue comparators, each of which compares the input voltage with one voltage somewhere "along2 a 256 resistor potential divider. The output of the 256 "one-bit ADCs" is converted to an 8-bit number by combinatorial logic. That combinatorial output will continue to change while the input is changing. A separate 8-bit latch is then used to capture the output at a suitable instant, the sampling instant. A variant of that is to have 256 latches, one for each of the 265 1-bit ADCs. Subsequent processing reduces the 256 digtial signals to an 8-bit number. EDIT: I see our replies crossed in the æther! |
| tggzzz:
--- Quote from: pcprogrammer on October 25, 2022, 09:41:25 am --- --- Quote from: gf on October 25, 2022, 09:00:03 am ---Virtualy any ADC does. Continuous-time sigma-delta ADCs are the only exception i'm aware of. --- End quote --- A sigma delta converter is in itself a kind of sample and hold device. It keeps track of the input signal and checks if it goes up or down on the next clock. --- End quote --- It can be analysed as a dithered 1-bit ADC with subsequent digital signal processing. |
| tautech:
--- Quote from: pcprogrammer on October 25, 2022, 09:25:53 am --- --- Quote from: tautech on October 25, 2022, 08:48:53 am ---Do you think the sampling dots in a DSO in Dot mode are just invented ? --- End quote --- Actually the original FNIRSI-1013D does invent (calculates) them when the input is above 44MHz :-DD --- End quote --- They haven't got that to themselves. Back in 2010 a member reported the early Rigol's doing similar things. |
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