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Online tggzzz

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Re: Building my own scope
« Reply #25 on: October 20, 2022, 07:55:22 pm »
There is a fine line between tackling a project that stretches you and one which can't be completed within reasonable time and effort. Engineers ought to be able to distinguish[1]. N.B. it is not for me to define "stretches you", "completed", "reasonable time", "reasonable effort". That's your decision :)

However, there is also nothing wrong with trying something, finding where the pain points are, finding workarounds - and knowing what you would do better next time. Indeed, in some circumstances that can be positively beneficial, e.g. during job interviews being able to demonstrate that you are interested in the subject and in continuously improving your knowledge and judgement. Back in the 70s I built a 6800 computer (similar to an Altair 8080) from scratch. In many ways it was appalling, but I learned a hell of a lot and could discuss things with other people.

I would suggest that learning when and how to use (or to avoid using) FPGAs is a useful skill, just as learning how to programme microcontrollers is useful. I would also suggest that if you are starting from scratch, then the magnitude of learning FPGAs is similar to that of learning MCUs.

Have fun! :)

[1] Eric Laithwaite at Imperial College used to set exams where one question was easy and sufficient get you a pass mark, one was more challenging and couuld get you a good degree, and one could not be answered adequately in the time available. He expected his undergraduate engineers to be able to determine which questions to avoid. If they couldn't, they wouldn't make good engineers anyway.

I have to say I'm studying physics, not engineering. We are somewhat supposed to venture even in stuff that cannot be explored in any reasonable stretch of time  ::)

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But yours are good advices nonetheless!

One step forward would be establishing if it's absolutely necessary to use a FPGA.
I'm sure it'd be interesting to learn FPGAs per se, but nevertheless I need to know if one can make a functional scope with just a computer, a front end, and an ADC.

You need to capture samples at a regular defined rate without missing samples. Ideally you also do a little real-time processing to identify when to start/stop capturing them, i.e. a trigger.

Whether or not you need an FPGA depends on the sample rate and sample depth, and the degree to which you can/cannot rely on a computer to keep up. The latter depends on what other things the computer is doing and the guarantees about the computer instruction timing. I know of only one computer that guarantees instruction timing: the XMOS xCORE family. With all others you have to guess and test and hope that you have spotted the worst case. The guesswork and testing can be minimised by careful use of peripherals and by having the computer sitting around doing "nothing important". That is sufficient for many purposes.

Where a computer cannot guarantee to keep up with the input samples all the time, you have two choices: reduce the sample rate until it can keep up, or have buffers to match the peak/mean processing rates to the fixed input rate.

An FPGA has two things a computer (xCORE excepted) cannot have: guaranteed timing/latency and many independent operations occurring in parallel. The penalty is that the conceptual design and implementation technologies are completely different.
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Offline balnazzarTopic starter

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Re: Building my own scope
« Reply #26 on: October 20, 2022, 08:05:27 pm »
Where did balnazzar go ?
I think he fell in here:



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Offline balnazzarTopic starter

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Re: Building my own scope
« Reply #27 on: October 20, 2022, 08:14:04 pm »

You need to capture samples at a regular defined rate without missing samples. Ideally you also do a little real-time processing to identify when to start/stop capturing them, i.e. a trigger.

Whether or not you need an FPGA depends on the sample rate and sample depth, and the degree to which you can/cannot rely on a computer to keep up. The latter depends on what other things the computer is doing and the guarantees about the computer instruction timing. I know of only one computer that guarantees instruction timing: the XMOS xCORE family. With all others you have to guess and test and hope that you have spotted the worst case. The guesswork and testing can be minimised by careful use of peripherals and by having the computer sitting around doing "nothing important". That is sufficient for many purposes.

Where a computer cannot guarantee to keep up with the input samples all the time, you have two choices: reduce the sample rate until it can keep up, or have buffers to match the peak/mean processing rates to the fixed input rate.

An FPGA has two things a computer (xCORE excepted) cannot have: guaranteed timing/latency and many independent operations occurring in parallel. The penalty is that the conceptual design and implementation technologies are completely different.

Good information. Mhhh, so I guess the answer is "yes, USB scopes do have a FPGA inside them".

Suppose we allocate a PC to do only oscilloscope related things. There will still be plenty of OS processes competing for CPU cycles. I wonder if something like this: https://en.wikipedia.org/wiki/RTLinux could be helpful in attaining a decent sampling rate (e.g. 1 GSa/s with sufficient depth) without missing important signal's details....
 

Offline rob77

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Re: Building my own scope
« Reply #28 on: October 20, 2022, 08:15:15 pm »
One step forward would be establishing if it's absolutely necessary to use a FPGA.
I'm sure it'd be interesting to learn FPGAs per se, but nevertheless I need to know if one can make a functional scope with just a computer, a front end, and an ADC.

it's absolutely crucial to use an FPGA. without FPGA your options are pretty limited.

if you really want to go down the rabbit hole then Cyclone IV + FT602Q usb3 superspeed fifo will get you to the 100+ Msamples/s relatively cheap if you want to run the software on a computer.  it's a fifo for 400Mbytes/s - that can yield 400Ms/s at 8bit. but definitely need an FPGA to run the ADC and feed the fifo, there is no microcontroller capable of such IO speeds.
developing a usb connected "scope" would be the preferred way because it's much easier to write a software for a full fledged linux OS than it's for a small embeded system.

and a hint for "cheap" first experiments... there is a product which exactly has the Cyclone IV + FT602Q combo inside.. it even has a unpopulated jtag header for connecting USB blaster and it costs 120 Euro :)  Orico HVC-1080 video capture device - solder a 10pin IDC header for JTAG and you can immediately start playing with the FPGA + USB fifo and start writing software for data capture. later on you can desolder the video procesor chip from the device and use the freed up I/O pins on FPGA to interface the ADC and start capturing real data...then you can go even deeper into the rabbit hole and dive into the analog magic for the frontend...
if you bailout at any point, you still can solder the image processor back, flash the original bitstream back to the cyclone and you have very low losses because you still have your hdmi capture card back ;)

 

Online tautech

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Re: Building my own scope
« Reply #29 on: October 20, 2022, 08:16:52 pm »
Where did balnazzar go ?
I think he fell in here:

pic removeed.

It's the story of my life. I always end up down in there.
The task you plan to undertake will consume you entirely.
To have a glimpse of what's in front of you study this thread by tom66 that pcprorammer linked earlier:
https://www.eevblog.com/forum/testgear/a-high-performance-open-source-oscilloscope-development-log-future-ideas/
Tom got a fair way through with HW but then the fun begins to get anything like replicating or bettering the feature set in a $500 DSO.
Good luck.....maybe you haven't realized how complex the little SDS1104X-E you have actually is ?
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Offline alm

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Re: Building my own scope
« Reply #30 on: October 20, 2022, 08:23:55 pm »
Suppose we allocate a PC to do only oscilloscope related things. There will still be plenty of OS processes competing for CPU cycles. I wonder if something like this: https://en.wikipedia.org/wiki/RTLinux could be helpful in attaining a decent sampling rate (e.g. 1 GSa/s with sufficient depth) without missing important signal's details....

Back in the days of DOS this was feasible using twiddling bits on the parallel port. There were a number of parallel port oscilloscopes back then, with an okay sample rate for that time. The parallel port was a very simple protocol that could easily interface with discrete logic or small micro-controllers. These days IO has gotten a lot faster, but fast IO in PCs is usually serial bulk transfers, like USB, PCI Express or SATA. To connect ADCs to it you'd need something that regularly samples the ADCs, buffers it and sends it in chunks using your desired protocol. If you want high bandwidth, then an FPGA might be a good way to accomplish that ;).
 
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Offline balnazzarTopic starter

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Re: Building my own scope
« Reply #31 on: October 20, 2022, 08:24:55 pm »
Good luck.....maybe you haven't realized how complex the little SDS1104X-E you have actually is ?

No, indeed. But I'm starting getting an vague idea. There is a video of Eric Quinn being interviewed by Dave. He talks about how insanely difficult was to put together their first scope..

 

Online tggzzz

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Re: Building my own scope
« Reply #32 on: October 20, 2022, 08:26:40 pm »

You need to capture samples at a regular defined rate without missing samples. Ideally you also do a little real-time processing to identify when to start/stop capturing them, i.e. a trigger.

Whether or not you need an FPGA depends on the sample rate and sample depth, and the degree to which you can/cannot rely on a computer to keep up. The latter depends on what other things the computer is doing and the guarantees about the computer instruction timing. I know of only one computer that guarantees instruction timing: the XMOS xCORE family. With all others you have to guess and test and hope that you have spotted the worst case. The guesswork and testing can be minimised by careful use of peripherals and by having the computer sitting around doing "nothing important". That is sufficient for many purposes.

Where a computer cannot guarantee to keep up with the input samples all the time, you have two choices: reduce the sample rate until it can keep up, or have buffers to match the peak/mean processing rates to the fixed input rate.

An FPGA has two things a computer (xCORE excepted) cannot have: guaranteed timing/latency and many independent operations occurring in parallel. The penalty is that the conceptual design and implementation technologies are completely different.

Good information. Mhhh, so I guess the answer is "yes, USB scopes do have a FPGA inside them".

Cheap "toys" won't have an FPGA inside them; a 100kHz (say) scope could be based on an MCU alone.

More complex ones, almost certainly but not necessarily: it depends on what performance you require. I suggest you have a look at the Digilent Analog Discovery and/or the Red Pitaya.

Quote
Suppose we allocate a PC to do only oscilloscope related things. There will still be plenty of OS processes competing for CPU cycles. I wonder if something like this: https://en.wikipedia.org/wiki/RTLinux could be helpful in attaining a decent sampling rate (e.g. 1 GSa/s with sufficient depth) without missing important signal's details....

I wouldn't want to use a PC for anything more than the GUI, both because of the lax RT guarantees and because the x86-64 processors have caches and TLBs and lots of other features that increase the mean processing performance without changing the worst case performance. And for hard real time systems the mean performance is irrelevant.
There are lies, damned lies, statistics - and ADC/DAC specs.
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Offline balnazzarTopic starter

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Re: Building my own scope
« Reply #33 on: October 20, 2022, 08:27:49 pm »
To connect ADCs to it you'd need something that regularly samples the ADCs, buffers it and sends it in chunks using your desired protocol. If you want high bandwidth, then an FPGA might be a good way to accomplish that ;).

Mh, I see. I wonder how those Alazartech cards do actually work. Maybe they have a large memory buffer directly on the card, and then they send what they buffered in chunks exactly as you described...
 

Offline balnazzarTopic starter

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Re: Building my own scope
« Reply #34 on: October 20, 2022, 08:33:21 pm »

Cheap "toys" won't have an FPGA inside them; a 100kHz (say) scope could be based on an MCU alone.

More complex ones, almost certainly but not necessarily: it depends on what performance you require. I suggest you have a look at the Digilent Analog Discovery and/or the Red Pitaya.

I wouldn't want to use a PC for anything more than the GUI, both because of the lax RT guarantees and because the x86-64 processors have caches and TLBs and lots of other features that increase the mean processing performance without changing the worst case performance. And for hard real time systems the mean performance is irrelevant.

"The Analog Discovery 2 is built on a Spartan 6 FPGA".

Ok, if even a device with 100 MSa/s and shallow memory needs an FPGA, I think the matter is solved.

Thanks. If I venture into it, that will be a very-very-long-term learning project, without expecting to get my actual working scope from it.
 

Offline rob77

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Re: Building my own scope
« Reply #35 on: October 20, 2022, 08:33:32 pm »
If you want high bandwidth, then an FPGA might be a good way to accomplish that ;).

FPGA is the only way ;) there is no RT OS capable of sampling with low jitter at any reasonable sample rates...
If you do the sampling on the FPGA (low jitter), serialize the data, send it to the computer,  then processing on the computer is absolutely not critical.. the only concern would be to have enough processing power to get reasonable waveform update rates on the screen.
 
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Offline balnazzarTopic starter

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Re: Building my own scope
« Reply #36 on: October 20, 2022, 08:50:37 pm »
If you want high bandwidth, then an FPGA might be a good way to accomplish that ;).

FPGA is the only way ;) there is no RT OS capable of sampling with low jitter at any reasonable sample rates...
If you do the sampling on the FPGA (low jitter), serialize the data, send it to the computer,  then processing on the computer is absolutely not critical.. the only concern would be to have enough processing power to get reasonable waveform update rates on the screen.

Understood. This thread aready served a useful purpose. Previously, I was convinced that a computer could virtually tackle any possible task (up to its sheer computational power).
« Last Edit: October 20, 2022, 09:03:31 pm by balnazzar »
 

Offline alm

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Re: Building my own scope
« Reply #37 on: October 20, 2022, 08:57:20 pm »
FPGA is the only way ;) there is no RT OS capable of sampling with low jitter at any reasonable sample rates...
If you do the sampling on the FPGA (low jitter), serialize the data, send it to the computer,  then processing on the computer is absolutely not critical.. the only concern would be to have enough processing power to get reasonable waveform update rates on the screen.
I was thinking you might be able to hook up an USB SuperSpeed interface IC from the likes of FTDI to an ADC via some very simple glue logic. Especially if you could find an ADC with a parallel output.

Offline rob77

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Re: Building my own scope
« Reply #38 on: October 20, 2022, 08:58:43 pm »
Understood. This thread aready served a unseful purpose. Previously, I was convinced that a computer could virtually tackle any possible task (up to its sheer computational power).

also have a look at my suggestion with the video capture device ;) using a video usb fifo saves you a lot of time.. because the OS already has the drivers ;)
using that video fifo makes your life easy - you feed any data to the USB fifo with FPGA and on the computer side you simply just a open the corresponding "/dev/video" device and read it like a file ;) and you have a 400Mbyte/s data stream available to you with almost zero development ;)

 

Offline balnazzarTopic starter

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Re: Building my own scope
« Reply #39 on: October 20, 2022, 09:02:57 pm »
I know of only one computer that guarantees instruction timing: the XMOS xCORE family.

Mhh, here they are described as some sort of MCUs: https://www.xmos.ai/download/xCORE-Multicore-Microcontrollers-Overview(1.2).pdf
 

Offline balnazzarTopic starter

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Re: Building my own scope
« Reply #40 on: October 20, 2022, 09:04:37 pm »
I was thinking you might be able to hook up an USB SuperSpeed interface IC from the likes of FTDI to an ADC via some very simple glue logic. Especially if you could find an ADC with a parallel output.

Interesting! Would you kindly provide some starting point (links, etc..)?

Thanks!
 

Offline balnazzarTopic starter

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Re: Building my own scope
« Reply #41 on: October 20, 2022, 09:08:05 pm »
Understood. This thread aready served a unseful purpose. Previously, I was convinced that a computer could virtually tackle any possible task (up to its sheer computational power).

also have a look at my suggestion with the video capture device ;) using a video usb fifo saves you a lot of time.. because the OS already has the drivers ;)
using that video fifo makes your life easy - you feed any data to the USB fifo with FPGA and on the computer side you simply just a open the corresponding "/dev/video" device and read it like a file ;) and you have a 400Mbyte/s data stream available to you with almost zero development ;)

For unknown reasons, I missed your previous message, thanks for having pointed that out!

You mean this device? https://www.startech.com.bd/orico-hvc-1080-hdmi-to-usb3-0-video-capture-card
 

Offline rob77

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Re: Building my own scope
« Reply #42 on: October 20, 2022, 09:26:52 pm »
 
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Offline balnazzarTopic starter

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Re: Building my own scope
« Reply #43 on: October 20, 2022, 09:44:19 pm »
Now that could actually be a very effective starting point...
 

Online tggzzz

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Re: Building my own scope
« Reply #44 on: October 20, 2022, 09:51:18 pm »
If you want high bandwidth, then an FPGA might be a good way to accomplish that ;).

FPGA is the only way ;) there is no RT OS capable of sampling with low jitter at any reasonable sample rates...
If you do the sampling on the FPGA (low jitter), serialize the data, send it to the computer,  then processing on the computer is absolutely not critical.. the only concern would be to have enough processing power to get reasonable waveform update rates on the screen.

There is a halfway house.

Sample using a low jitter clock. Put samples in a FIFO/queue. At the computers convenience, take samples from FIFO  at computer's convenience. Provided the computer can take the samples at a mean rate that is higher than the sampling rate, all is well.

The averaging interval for calculating the mean rate is closely tied to the depth of the FIFO.
There are lies, damned lies, statistics - and ADC/DAC specs.
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Offline rob77

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Re: Building my own scope
« Reply #45 on: October 20, 2022, 10:12:32 pm »
Now that could actually be a very effective starting point...

yes, good starting point to get onboard with FPGA and writing software for linux.

if you will go for that capture board then obviously you have to desolder the FPGA to figure out what is connected to which io and create a io pin map  (ring the traces through with continuity tester) and then reball the fpga and solder it back.

i'm planing to do that once i'll have some time, but it's like that for few months already :D i'm planing to rip out the hdmi sink and the video-processor ,  make a small daughter board with bus drivers(level shifting) and use it for high speed data capturing (even using the HDMI connectors).
as you see on the picture i have the pin header populated on one of the boards, and can confirm it works with USB blaster and Quartus no problem, i can read and write the configuration memory through the FPGA.
 
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Offline rob77

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Re: Building my own scope
« Reply #46 on: October 20, 2022, 10:17:18 pm »
If you want high bandwidth, then an FPGA might be a good way to accomplish that ;).

FPGA is the only way ;) there is no RT OS capable of sampling with low jitter at any reasonable sample rates...
If you do the sampling on the FPGA (low jitter), serialize the data, send it to the computer,  then processing on the computer is absolutely not critical.. the only concern would be to have enough processing power to get reasonable waveform update rates on the screen.

There is a halfway house.

Sample using a low jitter clock. Put samples in a FIFO/queue. At the computers convenience, take samples from FIFO  at computer's convenience. Provided the computer can take the samples at a mean rate that is higher than the sampling rate, all is well.

The averaging interval for calculating the mean rate is closely tied to the depth of the FIFO.

isn't that exactly what the FPGA + USB fifo + OS device driver combo does ? ;)


 

Online tggzzz

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Re: Building my own scope
« Reply #47 on: October 20, 2022, 11:19:49 pm »
If you want high bandwidth, then an FPGA might be a good way to accomplish that ;).

FPGA is the only way ;) there is no RT OS capable of sampling with low jitter at any reasonable sample rates...
If you do the sampling on the FPGA (low jitter), serialize the data, send it to the computer,  then processing on the computer is absolutely not critical.. the only concern would be to have enough processing power to get reasonable waveform update rates on the screen.

There is a halfway house.

Sample using a low jitter clock. Put samples in a FIFO/queue. At the computers convenience, take samples from FIFO  at computer's convenience. Provided the computer can take the samples at a mean rate that is higher than the sampling rate, all is well.

The averaging interval for calculating the mean rate is closely tied to the depth of the FIFO.

isn't that exactly what the FPGA + USB fifo + OS device driver combo does ? ;)

Probably, but omit the FPGA and have a FIFO that isn't tied to a communication device ;)

Cats? I know lots of ways to skin them  ;D
There are lies, damned lies, statistics - and ADC/DAC specs.
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Offline BillyO

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Re: Building my own scope
« Reply #48 on: October 20, 2022, 11:52:30 pm »
I built a scope once.  Back in 1978.  It was a Heathkit.

The only way I'd build a 2nd one is if I found an un-built Heathkit kit.  Of course that would probably cost me as much as a decent new car, but a whole lot less than a Keysight 8ch 32GHz jobbie.

I wish you success.  This is a bigger project than I would ever take on as a hobby.
Bill  (Currently a Siglent fanboy)
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Offline rob77

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Re: Building my own scope
« Reply #49 on: October 20, 2022, 11:58:07 pm »
Probably, but omit the FPGA and have a FIFO that isn't tied to a communication device ;)

Cats? I know lots of ways to skin them  ;D

and how exactly would you connect it to the computer ?
 


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