Products > Test Equipment

Building my own scope

<< < (9/32) > >>

balnazzar:

--- Quote from: alm on October 20, 2022, 08:57:20 pm ---I was thinking you might be able to hook up an USB SuperSpeed interface IC from the likes of FTDI to an ADC via some very simple glue logic. Especially if you could find an ADC with a parallel output.

--- End quote ---

Interesting! Would you kindly provide some starting point (links, etc..)?

Thanks!

balnazzar:

--- Quote from: rob77 on October 20, 2022, 08:58:43 pm ---
--- Quote from: balnazzar on October 20, 2022, 08:50:37 pm ---Understood. This thread aready served a unseful purpose. Previously, I was convinced that a computer could virtually tackle any possible task (up to its sheer computational power).

--- End quote ---

also have a look at my suggestion with the video capture device ;) using a video usb fifo saves you a lot of time.. because the OS already has the drivers ;)
using that video fifo makes your life easy - you feed any data to the USB fifo with FPGA and on the computer side you simply just a open the corresponding "/dev/video" device and read it like a file ;) and you have a 400Mbyte/s data stream available to you with almost zero development ;)

--- End quote ---

For unknown reasons, I missed your previous message, thanks for having pointed that out!

You mean this device? https://www.startech.com.bd/orico-hvc-1080-hdmi-to-usb3-0-video-capture-card

rob77:

--- Quote from: balnazzar on October 20, 2022, 09:08:05 pm ---
You mean this device? https://www.startech.com.bd/orico-hvc-1080-hdmi-to-usb3-0-video-capture-card

--- End quote ---

yes and this is what's inside

balnazzar:
Now that could actually be a very effective starting point...

tggzzz:

--- Quote from: rob77 on October 20, 2022, 08:33:32 pm ---
--- Quote from: alm on October 20, 2022, 08:23:55 pm ---If you want high bandwidth, then an FPGA might be a good way to accomplish that ;).

--- End quote ---

FPGA is the only way ;) there is no RT OS capable of sampling with low jitter at any reasonable sample rates...
If you do the sampling on the FPGA (low jitter), serialize the data, send it to the computer,  then processing on the computer is absolutely not critical.. the only concern would be to have enough processing power to get reasonable waveform update rates on the screen.

--- End quote ---

There is a halfway house.

Sample using a low jitter clock. Put samples in a FIFO/queue. At the computers convenience, take samples from FIFO  at computer's convenience. Provided the computer can take the samples at a mean rate that is higher than the sampling rate, all is well.

The averaging interval for calculating the mean rate is closely tied to the depth of the FIFO.

Navigation

[0] Message Index

[#] Next page

[*] Previous page

There was an error while thanking
Thanking...
Go to full version
Powered by SMFPacks Advanced Attachments Uploader Mod