I agree that the machine tool analogy proved to be less than helpful.
...
Maybe I should give up on trying to generate analogies ... I think I'm going from bad to worse!
That frequently happens with analogies Analogies are often dangerous
analogies is good to broaden our perspective. imho awakephd's analogy is valid from his perpective. try to learn to see the world from other people's eye.
The other issue is ensuring thold requirements are met. Those are fixed for a given logic family, are <<tclock, and reducing the clock frequency doesn't help (unlike tsetup).
whats your point? those are specifications available in datasheet. they can add variables into the equation. better set the scew setting in scope right first. with BW limited scope, risetime will be "smoothen" anyway.
You don't need to.
Connecting four 1Hz signals with transition times <2ns is sufficient.
OK, discussion has been changed from sine waves and Nyquist limits to pulses just for me... got it.
No, the discussion hasn't been changed.
Or perhaps you think the Nyquist limit only applies to sine waves? Hint: it doesn't.
practically for square wave, Sinc interpolation failure is to plot only on transition edge. square wave misplot (Gibb's artefacts) is a lot less confusing than sin/analog misplot. if you know what i mean.
It's about observing short pulses, or intermittent glitches, or debugging signal integrity issues and visualizing transitions in digital circuits in general, where having to correlate one signal (e.g. clock) to another one or several is a legit and common use case: it requires both looking at transitions and having multiple inputs enabled at the same time.
Exactly.
It repeatedly surprises me how difficult it is to get people to recognise that.
Is the Rigol's inability to properly display such waveforms fatal? No, by no means it's not: after all, it doesn't fail to display them completely, so you will see it if there is something. Will it prevent the job from being done? No it will not, at least as long as the user is aware of these edge case (pun intended!) shortcomings.
Yup. Any scope is better than none, and you always have to be aware of the limitations of your tools.
A key use case w.r.t. signal integrity is verifying that a received clock signal is monotonic and without overshoot etc. That requires bandwidth plus good probing technique, and nothing else.
For data signals... Well some people claim they aren't repetitive, but clearly such people don't understand eye diagrams. They are much better at detecting signal integrity issues than "repetitive" signals.
And once the signal integrity has been verified, it is often better to flip to the digital domain and use a logic or protocol analyser.
what you type is true but inapplicable if you want to use it on BW crippled scope like both dho800 and sds800x. dho800 maybe less crippled, but can show incorrect signal. with sds800x, you wont see any glitches or overshoots on transition edge due to "proper" BW limiting. anyway, trying to do signal integrity at sub ns risetime, you need more expensive tool. signal integrity is about risetime specification is met, and also no excessive overshoot or reflection, and also prog. delay and jitter etc... imho you need at least 10 points for each ns, and thats 10-20GSps, none dho800 nor sds800x can provide. they only suitable for checking 10-20ns risetime logic, i guestimate 5-10Mbps, "signal integrity" wise. dont think nor expect too much.
fyi, recently i managed to figure out (rev.eng) which one is which on 14 bit DAC lane from FPGA clocked at 150-170MHz with just 4CH scope Rigol DS1054Z. with all the theories, opinions and philosophicals here, i shouldnt be able to. ymmv.
The only important parameter is the analogue bandwidth. Advertising a samples/s figure much higher than 2.5*BW figure is marketing wank; it merely eases some implementation details inside the scope.
are you talking about sds800x? you opinion is partly true but saying its marketing wank is too much imho. trying to ease implementation also can means trying to represent true signal on screen and trying to be honest.
The other issue is the number of bits. 30 years ago I used top-end HP DSOs to measure sub-nanosecond risetimes; they were 6bits at best.
The number of bits is more important if you want to look at the frequency domain version of a signal, since they translate into the noise floor and spurious interpolation products. Here again there can be a lot of marketing want (that's why my .sig is there ). The key figure is the ENOB, the effective number of bits. Here 12 is usefully more than 8.
More than 8 bits can be useful in other circumstances, but not really for signal integrity. A beginner is unlikely to require 12 bits for time domain measurements.
i cannot brain this... afaik signal integrity, you need more bits and more sample rate because we try to look in analog domain, not digital domain. and super many overlapping traces. if you want to look at digital domain alone, 1 bit scope / LA is enough. and 12 bits is not just for your logic family's application, other people use it for other things like audio? and FFT, so dont assume we are the only batch of breed on earth. and err... whats the cost of your top-end HP DSOs back then? and its equivalent price today?
If cost is a dominant concern, then there are much cheaper alternatives than 8bit scopes.
You can get a 2 channel 12 bit scope for $390, or 4 channel for $440. True, for some that price is too high, and they'll stick with less expensive 8 bit scopes. But that's a pretty small percentage on the grand scheme of things.
I was thinking of more extreme constraints and radically different solutions.
is this what's in your mind?
£6 24MHz 8 Channel USB Logic Analyzer 8 CH Logic Analyzer for Arduino MCU this imho is good enough for logic families (but not for signal integrity mind you). please try to be specific instead of open pop quiz statement. this is electronics forum, not philosophical forum.
here you demo that at some setup Sr / 2.22, sds800x is unable to reconstruct signal properly? from the look of it, yes it is.
Not correct. What I've shown is the behavior at SR / 2.04, not 2.22. The input signal was a 490 MHz sine.
but you have the capture title saying 450MHz (now i see you edited it), anyway in my earlier post above you, i said i stand corrected...cheers.
A beginner is unlikely to require 12 bits for time domain measurements.
The key word here is "require". Yes, true, 12 bits are hardly required, in the strict sense.
However, having 12 bits of vertical resolution (assuming other parameters equal) simply makes the experience of using the scope more enjoyable: less pixelation and all, you know what I mean. That's important. Tools that are more pleasant to use encourage the user to spend more time with them and thus learn more and become more proficient.
Not only that, the scopes are so cheap there's no point in getting an 8bit scope unless there's some advanced features or specs needed. Even still, the 12 bit stuff available now is really competitive.
not to mention he keep confusing beginners that will read this thread with his 70's era's opinion. no insult nor ill-mean intended to him, i only reply to what are ambiguous/confusing, not just from him. cheers.