Products > Test Equipment
Cloning the HP3325A Option 002 - HV Output
Jay_Diddy_B:
Hi,
I see that you have copied the circuit from this post:
https://www.eevblog.com/forum/testgear/cloning-the-hp3325a-option-002-hv-output/msg2337558/#msg2337558
It is still a work in progress, but I have attached my latest LTspice model. I have removed the protection circuit for now. I will put it back at the end.
I have never taken this beyond the LTspice model.
I used 2n3904 and 2n3906 transistors in the LTspice model, these are 40V transistors. I can do this in SPICE because SPICE doesn't model the breakdown voltage.
Q4, Q5, Q11 and Q12 should be 80V transistors.
So building this circuit is risky.
Protection
I have highlighted the parts that need to be added to implement protection for the output devices.
4 Layer Board
Terra Operative used the original HP schematic and built it on a 4-layer board. It did not work as well the original 2 layer design. This is documented in this message:
https://www.eevblog.com/forum/testgear/cloning-the-hp3325a-option-002-hv-output/msg2450364/#msg2450364
I think there may be similar issues building the amplifier I designed on a 4-layer board.
Regards,
Jay_Diddy_B
AlfBaz:
Hi Jay, thank you for the clarification.
I mentioned that I was in the process of "verifying transistor selection".
In actual fact all I have done is drawn up the schematic with generic components and pushed their generic foot prints to the PCB, followed by a quick route.
The only thing that's complete is the size of the board and the position of the BNC's to suit the Hammond case I've chosen
I had noted you removed the protection circuits but decided to go without to simply see how it performed compared to the simulation and to the data you and Terra Operative collected.
I'll just have to be extra careful when testing.
Thanks for pointing out the 4 layer issue, I had missed that.
I originally went 2 layer but didn't save that version when I changed to 4 layers. Just some extra vias really so no big deal to change it back.
I have a different stack up so I might still go 4 layer just to see what happens as all my signals are on the top layer followed by Vcc, Vee and finally ground on the bottom.
I'll order both the 4 and 2 layer boards at the same time and enough components to do both. I like making mistakes, it's how I learn :)
LTspice shows current draw from the rails as less than 100mA so I may be able to use smaller regulators than the ones currently used for the final board. I'll leave it as is and test on the actual circuit first
SilverSolder:
I'm not sure I totally understand why the 4 layer board is a problem - does it introduce extra capacitance that rounds the edges of the signal, or something like that?
AlfBaz:
I believe the problem was overshoot as shown in the post just before the one linked by Jay_Diddy_B. There may be some signals coupling via the planes :-//
Jay_Diddy_B:
--- Quote from: AlfBaz on September 23, 2020, 08:40:22 am ---
P.S.
Hope you don't mind Jay :)
--- End quote ---
I don't mind at all. I encourage it.
AlfBaz,
I would add some copper to the collector connections on the output transistors Q7 and Q8. There is no concern with capacitance to the ground plane, because these are essentially at dc potentials. You look at the LTspice model for the dissipations.
I suspect that the issue with the four layer board is capacitance to the ground plane. This is a high speed circuit running at relatively small currents.
All we really know is that the original circuit, my layout and Terra Operative's second layout all work better than the Terra Operative's 4-layer version.
Regards,
Jay_Diddy_B
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