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| Measuring Distortions with the Scope:What you see is not what you really have.. |
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| nctnico:
--- Quote from: _Wim_ on January 07, 2023, 06:52:49 pm --- --- Quote from: nctnico on January 07, 2023, 06:20:37 pm ---Agreed. For starters there has to be enough white / Gaussion noise for eres / high resolution to work well. Eres and high-res are nice tools to make a signal look cleaner but if you zoom in far enough, you can see all kinds of weird distortions. I recall doing some testing on my good old Tektronix TDS744A. Turning the 20MHz bandwidth limit on, made the high-res produce all kinds of fantasy signals. The same goes for FFT; you need to be really carefull with interpreting what you are seeing. Deep FFT is useful to look at closely spaced frequencies (as others have mentioned as well) but the extra dynamic range might not be there at all. Or put differently: the reliability of the measurement results that are below the dynamic range of the ADC, is very low. --- End quote --- I agree some fantasy signals can be shown, but this is in my (limited) experience always below the effective dynamic range (so not the dynamic range visualized, but the once calculated using the enhanced number of bits). Is there in your opinion a difference between oversampling (https://www.analog.com/media/en/technical-documentation/tech-articles/Increase-Dynamic-Range-with-SAR-ADCs-Using-Oversampling.pdf) and HIRES? For me it seems this is exactly the same, but I could be missing something. --- End quote --- It is exactly the same. |
| JeremyC:
--- Quote from: _Wim_ on January 07, 2023, 06:36:23 am ---I think you need to re-watch the referenced video by W2AEW (#65: Basics of using FFT on an oscilloscope), because it perfectly makes sense to use HI-RES or ERES to increase the effective number of bits. This way an 8-bit scope can have a larger effective number of bits at a much lower bandwidth. --- End quote --- I watched this video many times and I read many FFT related publications from the “A” vendors in the last few years. Sorry, I should mention in my posts that I disagree with W2AEW about the averaging/hires modes with FFT. In my opinion W2AEW is excellent (if not the best) information source and I’m glad he’s sharing his knowledge and experience with the public. But in this topic I would disagree with his opinion about averaging combined with FFT, sorry. |
| nctnico:
Think of it this way: if you can make extra information appear magically from an 8 bit ADC, then why aren't we all using scopes with 1 bit ADCs? Even cheaper to make! |
| mawyatt:
--- Quote from: nctnico on January 08, 2023, 02:31:25 am ---Think of it this way: if you can make extra information appear magically from an 8 bit ADC, then why aren't we all using scopes with 1 bit ADCs? Even cheaper to make! --- End quote --- There is no "magic" in these concepts and in fact many of the slower Delta Sigma types are simply 1 bit core ADC types (1 bit comparator) with massive Oversampling and Multi-Order Modulators followed by high order Decimation Filters and easily achieve well beyond 20 ENOB, these are the common 24 bit Delta Sigma ADC chips that only cost a few $!! Many of the higher speed ADC chips employ techniques similar to the 1 bit core Delta Sigma ADC, except they utilize more than 1 bit (usually 3 ~ 4) in the "Comparator" and DAC "Feedback" path to speed the overall conversions up, and digitize the Signal - Feedback difference instead of integrating such as the DS ADC do (if they utilize integration then some of the benefits of Modulator induced "Noise Pushing" can be employed, but this slows things down). As was mentioned by another earlier post, the HIRES and ERES are effectively doing something similar to what some of the core silicon ADC chips are doing to enhance resolution, and as shown is always a tradeoff between resolution and speed. This is where the mentioned new type ADC architecture may come into play which makes amplitude quantizations but at non-uniform sample intervals which are dictated by the input signal, so simultaneous amplitude and time quantizations...but this is another topic well beyond the scope being discussed here. So there are many ways/techniques to approach the ADC, some are completely within the CMOS chip, some are external software enhanced, some external hardware enhanced, and some both hardware/software enhanced. They all are trading off speed/BW for resolution, but none rely on "magic" to achieve their respective results. What you may have interpreted as "magic" in rf-loops notes with the lower level dual unequal tones, one of which is lightly AM modulated, is the effect of the larger tone acting as a "dither" for the lower ADC bits to resolve the smaller tone with AM modulation. This was (maybe still is) a classic technique to improve the apparent resolution/linearity of a non-linear device with a non-responsive zone, called "dead zone". The ADC is non-linear across each LSB transition because it has a "dead zone" where the bit doesn't respond to the input signal, where added noise (maybe internal) or additional signal will modulate the LSB transition, effectively "dithering" across the LSB dead zone and subsequent filtering can reduce the dead zone effects and resolve into fractional LSBs revealing input signal fine details below the LSB as shown. Best, |
| Performa01:
No doubt that the real deal – a true higher resolution ADC – is the superior solution. Yet there is nothing wrong with a proper ERES/HiRes implementation as long as the user thinks a little. And that should not be too much asked, since there are so many situations in T&M where we cannot trust blindingly and just copy some values from an instrument to the lab protocol without a second thought. For instance we might run into troubles when we try to measure a -60 dBm signal using FFT when the corresponding input channel is set to 100 mV/div (800 mVpp = +2 dBm full scale). This is clearly outside the genuine 8 bit dynamic range. SDS2354X Plus_LVL_10MHz_100mV_-60dBm_8bit The measured amplitude is -57.5 dBm, hence 2.5 dB off – just remember, we try to measure a 632 µVpp signal at an 800 mVpp full scale input range. In a low noise DSO, the so called "process gain" doesn't work that well, fair enough. But then again, not many will attempt to measure such a weak signal by using a particular insensitive input range of the scope – we would rather choose 1mV/div instead: SDS2354X Plus_LVL_10MHz_1mV_-60dBm_8bit Unsurprisingly, the measured amplitude is correct now; -59.9 dBm means that the error is just 0.1 dB. For a fair comparison, now that we used a 40 dB more sensitive input range, we should also try to measure a 40 dB lower signal, i.e. -100 dBm instead of -60 dBm: SDS2354X Plus_LVL_10MHz_1mV_-100dBm_8bit All of a sudden even the signals outside the genuine dynamic range are measured accurately: -99.9 dBm is only 0.1 dB off again. This is because at a high sensitivity of 1 mV/div we have sufficient inherent noise to make the resolution enhancement inherent to a longer FFT fully work. What if there are any stronger signals present, so we cannot select a higher sensitivity without overdriving the scope input? All the better, then even the lower sensitivities will work, because now we don't need noise as dither anymore, but have those stronger signals instead. Of course, a 12 bit SDS2000X HD doesn't have any troubles measuring -60 dBm even in the insensitive 100 mV/div (+2 dBm FS) range. After all, this is still within its genuine dynamic range of ~72 dB. SDS2504X HD_LVL_10MHz_100mV_-60dBm_Normal The last screenshot demonstrates how we can still measure -100 dBm (6.3 µVpp, far outside the genuine dynamic range) at 100 mV/div (800 mVpp) with only 0.74 dB error: SDS2504X HD_LVL_10MHz_100mV_-100dBm_Normal |
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