GPIB Questions. Mostly about layer 1

[DiBosco]

Hi all,

We've been asked to bring a very old GPIB unit up to date. I've spent some time reading lots about GPIB and although it on the whole seems fairly straightforward I have some questions, largely in the wake of TI making SN75160, 1 and 2 obsolete.

What we're modernising is a device, it will never be a controller.

Q1. My first question is about Attention, Interface Clear and Remote Enable lines. Several articles I have seen state that the controller is what drives these lines, yet I have seen a couple of articles or posts (where, I can't remember - I have read so much today) that suggest these are bidirectional lines even for a device. If a product is never going to be a controller, can they be fixed as inputs only into our product's micro?

A lot of posts on here say that the bus is open collector, yet several articles including http://www.interfacebus.com/Design_Connector_GPIB.html say that there are totem pole, open collector and tristate devices.

Starting with the databus. The I/O diagram on the 75160 datasheet I don't follow, it talks about driver output and receiver input equivalent resistance as being 30R and 110R respectively and Req is a pull up, I think internal to the chip. To me, the input looks like a totem pole output, but I'm surely misreading it.

TI say you could possibly use CY74FCT245T or SN74ABT245B and they can certainly sink plenty of current, but they are clearly not open collector devices.

Q2. So with all that in mind, looking at the GPIB databus first, is this part really a totem pole drive system that relies on only one node being set up as a driver? Even with the 75160 I don't understand what protects the system from two nodes getting out of sync, with one driving high into another node that is driving low and causing disastrous issues. I guess there's some protection built in to them to prevent this being an issue.

If it is an open drain system I'm sure the pull-ups must be in the 75160 because I've seen circuits using these soon to be obsolete chips that have no external pull-ups.

Q3. If it is an open drain system how can TI be recommending the likes of a SN74ABT245B?

Q4. It's clear to me how NRFD, NDAC and SRQ work in terms of needing to be open collector, but with not being able to use SN75161 or 2, it seems to me that the best/easiest bet here would just be to have a micro drive a transistor (or FET) and connect its collector to the outside world. What concerns me about this is someone just sticking 5V on to it and it getting turned on. Any series resistor big enough to protect would start to prevent the line getting pulled down low enough; this suggests the necessity of a current sense resistor's voltage being used to pinch off an output FET with a transistor but this would have to be done way before it got to 0.7V! So I'd be looking at setting up a comparator to turn off the FET when it got too big, which seems to me to be getting a bit convoluted.

So what's the best bet here? I have searched, without joy, for some devices that have open collector outputs and built in current limit, but drawn a blank; does anyone know of such a thing? Even then I'll have to use up two GPIOs per line on the micro because I'll have to monitor it as well as drive it.

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I realise this is a lot of questions and I suppose I could reduce it down to with the 7516x family being made obsolete, what is the best way to drive the bus in terms of the interface between the micro on our device and the outside world? 

Thanks!

[nctnico]

Why not do a last-time-buy of the GPIB chips? That will be a lot more cost effective compared to re-designing these very domain specific devices. And as GPIB is still offered on test equipment, I'd take a look into how the GPIB interface is implemented on these IF they don't the the standard GPIB chip set.

I also don't quite see how you would modernise a GPIB device by replacing the chips. Why not add an ethernet interface which translates LAN to GPIB internally?

[DiBosco]

Why not do a last-time-buy of the GPIB chips?

The last time buy might happen, but it's not an ideal solution and doesn't answer any of my questions.

I also don't quite see how you would modernise a GPIB device by replacing the chips. Why not add an ethernet interface which translates LAN to GPIB internally?

I don't understand the point you're making here. It has to have a GPIB interface on it, it simply cannot be Ethernet controlled - this is what the end customer wants. It's other chips, most especially the micro, inside the product that need replacing due to obsolescence.  Also, there's some slightly different functionality being used on this next gen.

Frankly I think GPIB is a batshit thing in this day and age, but you have do what the customer wants.

[cruff]

IFC (interface clear) is reserved for the GPIB controller. A device must never pull that line down.