Products > Test Equipment
Desktop DSO for hardware and firmware development of MCU systems
Fungus:
--- Quote from: Wilson__ on September 12, 2024, 08:15:30 pm ---Effective ADC bit (ENOB) is about 1.5 to 2 less than the specification? 8 bit ADC has 6 bit real accuracy and resolve 64 steps of digital SPI signal. Would that be enough for task below?
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Yes.
You're mostly interested in timing between channels and signal rise times, not precise voltage levels.
--- Quote from: Wilson__ on September 12, 2024, 08:15:30 pm ---How much sampling rate do I need to see the signal, without risk of missing some short time glitch? SDS2104 is 1GSa/s when all 4 ch activated, right? For 20MHz SPI clock, 50 dots per cycle. Enough?
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You're not interested in a "cycle", you're interested in looking at the rising/falling edges.
There's not really a "too much" for that.
Fungus:
--- Quote from: Wilson__ on September 12, 2024, 08:15:30 pm ---No ringing, overshoot, undershoot.
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Those measurements will mostly be down to your probing technique, not the 'scope itself.
You should be OK with ordinary probes at 20Mhz clock frequencies, even if you have to resort to the little springs that come in the bag.
You could add little spring-probing points to your PCBs to make life easier, or even places to solder in an SMA connector.
2N3055:
--- Quote from: Wilson__ on September 12, 2024, 08:15:30 pm ---Effective ADC bit (ENOB) is about 1.5 to 2 less than the specification? 8 bit ADC has 6 bit real accuracy and resolve 64 steps of digital SPI signal. Would that be enough for task below?
How much sampling rate do I need to see the signal, without risk of missing some short time glitch? SDS2104 is 1GSa/s when all 4 ch activated, right? For 20MHz SPI clock, 50 dots per cycle. Enough?
On speed alone, Rigol MSO5074 is exceptional high 8GSa/s for 700 UK pounds.
I need the tool to do proper design verification after MCU software function ok.
Look at analogue waveform of signal sent between MCU and external chip over SPI. Verify data sheet setup time, hold time. Also, signal integity. Smooth rise fall of signal. No ringing, overshoot, undershoot.
Catch any rare occurrence signal that can fail the system once in, says, every 100 hours running. Says, "poor" power supply voltage dropped when multiple loads are switched at same time due to rare situations/software event.
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Don't get into sampling rate rabbit hole.For digital signals, your scope is limited with front end slew rate not sampling frequency. And since SDS200XPlus is 500MHz/800ps design, and MSO5000 is 350MHz/1ns it is obvious which one will have slight advantage here.
But that is least important.
In latest firmware for SDS200XPlus Siglent introduced I2C and SPI verification/test option that will automatically test compliance (when properly parametrized) and make an comprehensive PASS/ FAIL report.
This is something that so far was only available on high end scopes and option alone was 2-3x times more expensive than complete SDS2000X+ scope.
tggzzz:
--- Quote from: Wilson__ on September 12, 2024, 05:04:00 am ---Now, wanting a new digital scope to help firmware debug and verify SPI/I2C analogue signal quality at 10MHz square wave. These 4-ch scope decodes SPI full duplex traffic by hooking on MISO, MOSI, CLOCK ad nChipSelect, right?
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General principle:
* first look at analogue waveforms to ensure the waveforms will be correctly interpreted by receivers as digital signals. A scope is a suitable analogue domain tool
* once that is assured, flip to the digital domain, and use digital domain tools such as logic and protocol analysers
There are many simple cheap effective digital domain tools, e.g. Salae clones and BusPirate5. The better ones don't merely capture and post-process, but filter out the boring crap then capture and post process.
--- Quote from: Wilson__ on September 12, 2024, 06:23:02 pm ---What sampling rate do I need for MCU SPI signals at 10 to 40MHz clock rate.
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In the digital domain thinking in terms of frequency frequently (ho ho) leads to unhelpful and outright false reasoning. (Classic example is"scope bandwidth needs to be 5* clock frequency". That's rubbish; consider a 1Hz digital signal. The required bandwidth depends solely on transition time)
It is much better, simpler and clearer to think in terms of time and bit/baud rate.
In the digital domain with digital signals either:
* connect the UUT's clock to a flip-flop's clock, and use that to capture the UUT's data in the flip flop. That requires one sample per clock
* connect the UUT's clock and UUT's data to flip flop inputs, asynchronously sample the pair, and interpret the data stream to find an edge in the clock signal. The clock input must be inferred while the data input is stable, and that defines the sampling rate. To pick extreme figures, if you have a 100ns bit period but the data is only valid for 10ns within that 100ns, then you have to be able to locate the clock within the 10ns that the data is valid. You will probably want to sample every 2 or 3ns to ensure the edge is located sufficiently accurately.
tautech:
--- Quote from: 2N3055 on September 12, 2024, 08:55:52 pm ---In latest firmware for SDS200XPlus Siglent introduced I2C and SPI verification/test option that will automatically test compliance (when properly parametrized) and make an comprehensive PASS/ FAIL report.
This is something that so far was only available on high end scopes and option alone was 2-3x times more expensive than complete SDS2000X+ scope.
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And while you typed I grabbed some screenshots for Wilson_ .....
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