| Products > Test Equipment |
| DIY Current load, keeping it as simple as possible, thoughts? |
| << < (2/2) |
| Hexley:
Consider the MOSFET drive requirements: * You want 20 A split across 6 devices. So 3.3A each. * You can see from Figure 1 of the IRFP260N data sheet that it takes more than 4.5V Vgs to get 3.3A of drain current (at 25 deg. C) * The LM324 can only pull up to within 1.35 volts (typ.) below the positive rail, even when it is supplying negligible current. * Your circuit runs the LM324 from +5 volts. So it is good for 3.65 volts out. Not the required 4.5V. * That means the load won't reach 20 A at full tilt.You will probably want to run the opamps from +12V, so that you have plenty of oomph to drive the FETs at full load. And don't forget that you need one opamp section for each FET, as mentioned by ledtester. An active load is a fun design project, but there are lots of hidden issues. Good luck. |
| MarkF:
--- Quote from: SpottedDick on June 25, 2022, 02:06:52 pm ---OK, first off, I understand the issues with MOSFETs in parallel, so this discussion isn't about that. --- End quote --- Well, it should be! Clearly you don't understand because you are planning to do it anyway. The rest of the discussion is irrelevant because your MOSFETs are just going to burn up. You will never achieve a stable design with MOSFETs paralleled like that. Other than this fundamental flaw, take a look at Jay_Diddy_B's Electronic Load design: https://www.eevblog.com/forum/projects/dynamic-electronic-load-project/ Just add a few more MOSFET groups (each with its own op-amp and sense resistor) for the current capability and then switch out his front-end with your Arduino control. |
| pqass:
Reconsider 4 or 5 of these modules: https://www.eevblog.com/forum/testgear/example-of-why-people-say-you-sholdnt-use-mosfets-in-parrallel-as-dummy-load/msg4251337/#msg4251337 and see reply #17 too. All module opamp positive inputs are fed from the same DAC output. For example: 4 modules, each with a 0R1 shunt, therefore, a DAC output voltage of 500mA (after your divider) passes 20A at the output terminals. Each module's readback output is fed into an ADC input of its own or a non-inverting summing amplifier then a divide by four (# of modules) divider into one ADC input. If you use a LM358 then Vee (the negative rail) can be tied to GND; no negative supply required. However, there is still going to be <10mA flowing through the load. So not quite 0.000A unless you get a better (rail-to-rail) opamp. Having two opamps in the loop will double the offset. In my implementation, I measure the gate voltage at 3.4V, 4.7V, 4.9V, 5.1V, 6.5V when set to pass 0A, 3A, 4A, 5A, 6A, respectively (with a 0R1 shunt). So a 5V opamp supply won't cut it. You're going to need the resistor and cap in the feedback loop otherwise it will oscillate. A fuse on the positive terminal may be a good idea. How does the Nano get its power? Vin? My approach was to first work on the pure analog parts of the load; opamp(s), MOSFET(s), shunt(s). Use a simple pot to provide the set current to test it. Then work on the MCU, ADC, DAC, etc. parts. |
| SpottedDick:
--- Quote from: pqass on June 26, 2022, 01:36:49 am ---Reconsider 4 or 5 of these modules: https://www.eevblog.com/forum/testgear/example-of-why-people-say-you-sholdnt-use-mosfets-in-parrallel-as-dummy-load/msg4251337/#msg4251337 and see reply #17 too. You're going to need the resistor and cap in the feedback loop otherwise it will oscillate. A fuse on the positive terminal may be a good idea. --- End quote --- I actually have the fuse holder sitting there, I just didn't remember to put it in the schematic. This is just a first pass! Yes, feedback loop needs dampening, will be implemented. As someone just before you noticed, yes, the OP-AMPs will need more voltage. The Nano is getting its' 5V from USB. I like your modular idea! --- Quote from: Hexley on June 25, 2022, 10:40:56 pm ---Consider the MOSFET drive requirements: * The LM324 can only pull up to within 1.35 volts (typ.) below the positive rail, even when it is supplying negligible current. * Your circuit runs the LM324 from +5 volts. So it is good for 3.65 volts out. Not the required 4.5V. --- End quote --- Huh, I'm simulated this in Falstad circuit.js using the LM324 model and never noticed this somehow. Thanks for spotting this. I'll move them to the 12V rail. --- Quote from: mawyatt on June 25, 2022, 09:32:54 pm ---With a 3.75 mohm shunt, the offset voltage of the LM324 could easily create over an amp error!! With that low a shunt, you'll need a very low offset Op-Amp instead of the LM324. Edit: Also as mentioned, with the massive delay caused by the large number and size NMOS devices...and with the Miller effect, your circuit is almost guaranteed to be a oscillator. A well crafted frequency compensation network is a must. --- End quote --- Could you go into the voltage offset on the LM324 or point me in the right direction? EDIT: See the offset issue. It's closer to a 2A error than a 1A... Yes, oscillation dampening will be added. |
| mawyatt:
--- Quote from: SpottedDick on June 26, 2022, 02:00:36 am --- Could you go into the voltage offset on the LM324 or point me in the right direction? EDIT: See the offset issue. It's closer to a 2A error than a 1A... Yes, oscillation dampening will be added. --- End quote --- You can think of input referred offset voltage as a voltage source in series with the op amp input. In a closed loop condition like you have (which BTW is not a good design) the op amp will produce an output to drive the negative feedback loop to null out the offset, thus making the total offset approach zero. So in your case the op amp will drive the NMOS devices to produce a voltage so the net result will null the input referred offset of the op amp(s). Yes the current error could be well beyond 1A as the spec for the LM324 show 7mv max offset, and you have two of such op amps in the feedback loop. Analyze the loop and you'll soon see how this large error occurs, and with a little research you'll find numerous op amps with very low offsets. Your best path forward IMO is to spend some serious time studying analog circuit design, semiconductor devices and control theory. Once you are comfortable with these concepts then all the good advise you've received from others will begin to make sense and show you the proper path to producing a working circuit. What you have presented and seem to "defend" won't produce a workable and reliable circuit. Best, |
| Navigation |
| Message Index |
| Previous page |