Products > Test Equipment
EMC conducted emissions pre-compliance testing with home-made LISN
uski:
--- Quote from: Jay_Diddy_B on October 08, 2015, 03:09:29 am ---The model results show:
--- End quote ---
Nice, this is almost exactly what I measured in my post above using the signal generator ! :-+
T3sl4co1l:
--- Quote from: uski on October 08, 2015, 01:48:49 am ---Oh and by the way ! Very important !
The setup above does not differentiate from common-mode and differential-mode noise.
To do that, you need to first measure with one LISN (the output of the other one is terminated by a 50ohms load as shown).
Keep that data and then reverse the LISNs, measuring from the other one.
--- End quote ---
As long as the path lengths are matched (important for VHF+ range), you can use 0/180 degree couplers/splitters (the 3db "lossless" kind, not the 6dB resistor kind) to resolve two outputs into one analyzer. These are available from e.g. Microcircuits, I think with sufficient bandwidth for the present purpose, too.
Of course, you could build your own LISN with two channels, and this function built in (the transformer won't be terribly hard to wind, but probably won't offer terribly accurate phase matching at higher frequencies, so take it with a grain of salt), if you like.
Also, make sure to terminate the unused LISN output, if you are doing single ended measurements!
As for common mode, trying to filter low frequencies is difficult -- for example, just adding ferrite beads is almost futile, as you're trying to establish a divider between a relatively low impedance (the LISN at 50 ohms or so) and a fairly high impedance (the cables to the device will typically be in the 150-300 ohm range, as a transmission line over the ground plane). For this example, it also appears the device is pretty small, and the leads short, so it will be electrically short at those frequencies, i.e., acting as an even higher impedance capacitor.
Low frequencies are almost always either due to unfiltered (differential) ripple, poorly designed filtering (the ripple current couples into the ground line), or poor layout (currents flowing across the board create voltage drop between most of what "ground" is, and in turn, between the cable(s) leaving the board). In all cases, better filtering, and responsible control of ground loop currents (keep everything tightly localized, add ground plane cuts only where absolutely necessary to avoid currents across a filtering or signal path), will greatly improve things. :)
Tim
EMC:
Guys,
1) The above data, regards the inductance dropping with DC current, clearly shows my pessimism was unnecessary. The inductors are fine right up to 1 amp; even then the drop off is negligible.
2) With regard to verifying to LISN impedance at higher DC currents. Two ways ''test'' or ''simulate''. I have not done this but believe ''test'' can be done using a DC coupling/decoupling circuit. If I look up the chebychev tables for a 3 element high pass with series caps and parallel inductor; then combine the cap values, it would be a 400nF cap and 1mH inductor. Combine both caps so that we have an L circuit, cap to block at the input and L to enable application of the test current, then same at the output but reversed. Inductor value is too high so it is too hard to realise. So all of the above LTSpice data and ''simulate'' would be the best way.
3) All of the above concern about impedance and measurement error is not required if you use the substitution method I described. Test your device to get a a max hold trace on the DSA. Then set up as I describe and adjust the sig gen to the same deflection. Read your result from the sig gen then compare to the limit. The LISN ímpedance, and other errors, are in both readings and therefore removed from the result! :-+ (my only concern is the original 3dB difference with the test house)
4) Regards frequency selection. I understand your shift to a higher frequency but it's still in the AM band. Any chance of going to 1.9MHz? Apart from a little band at 5.9 to 6.2MHz there are no limits to worry about. Just dont go for exactly 2MHz or the third will fall in that little 6MHz band.
Great discussion guys.
Steve
PS The reason the above reading goes low at low frequencies is that there is no inductive reactance, XL = 2 Pi F L. At DC and low frequencies XL is very low; as frequency goes up so does XL. But, because of the DSA input Z of 50 ohms is in parallel with it, the total Z asymtotes to 50 ohms. (bit less that 50 actually because there is a 1k parallel as well)
uski:
--- Quote from: EMC on October 10, 2015, 10:00:01 am ---2) With regard to verifying to LISN impedance at higher DC currents. Two ways ''test'' or ''simulate''. I have not done this but believe ''test'' can be done using a DC coupling/decoupling circuit. If I look up the chebychev tables for a 3 element high pass with series caps and parallel inductor; then combine the cap values, it would be a 400nF cap and 1mH inductor. Combine both caps so that we have an L circuit, cap to block at the input and L to enable application of the test current, then same at the output but reversed. Inductor value is too high so it is too hard to realise. So all of the above LTSpice data and ''simulate'' would be the best way.
--- End quote ---
Maybe Jay_Diddy_B, our LTspice expert, can give this a try if he has some time to spare on this ? :)
--- Quote from: EMC on October 10, 2015, 10:00:01 am ---3) All of the above concern about impedance and measurement error is not required if you use the substitution method I described. Test your device to get a a max hold trace on the DSA. Then set up as I describe and adjust the sig gen to the same deflection. Read your result from the sig gen then compare to the limit. The LISN ímpedance, and other errors, are in both readings and therefore removed from the result! :-+ (my only concern is the original 3dB difference with the test house)
--- End quote ---
Oh I finally understood what you mean by the substitution test ! Definitely worth a try, especially if there is a need to get a precise reading. But in that case you'd need to have calibrated equipment (at least the generator) otherwise you wouldn't know where the error would come from. In my case the margin was sufficiently high that I wasn't really bothered by 2-3 dB of uncertainty.
If you look at my second measurement, you see that the difference with the test house is not all that big, less than 1dB, when using the proper detector and setup.
EDIT: There may still be a problem with the substitution test: it would not simulate the bias current (see post below by T3sl4co1l). So even if you see the same reading, it doesn't mean the amplitude of the generator is right, because when tested under bias the LISN might have different characteristics.
--- Quote from: EMC on October 10, 2015, 10:00:01 am ---4) Regards frequency selection. I understand your shift to a higher frequency but it's still in the AM band. Any chance of going to 1.9MHz? Apart from a little band at 5.9 to 6.2MHz there are no limits to worry about. Just dont go for exactly 2MHz or the third will fall in that little 6MHz band.
--- End quote ---
Now that's an excellent point which I haven't been considering...
It is too late for me to change the frequency in that design revision (I can't delay the project and certification with another change and round of test); but I will definitely do it for the next version. I like to be a good radio citizen :) I'll aim for 1.9MHz. And increasing the frequency will probably make the noise even lower (higher freqs are easier to filter).
I'm surprised that the test house specifies EN 55022 class B limits which are higher than than EN 55025 limits you have mentionned. They specify CISPR 25 but use EN 55022 limits ?! Could that be a mistake on their side ? It looks like I'm still slightly below the EN 55025 limits anyway, but still, this is weird...
Very interesting discussion indeed. I'm learning a lot, thanks guys !
uski
T3sl4co1l:
--- Quote from: uski on October 10, 2015, 11:35:02 pm ---
--- Quote from: EMC on October 10, 2015, 10:00:01 am ---2) With regard to verifying to LISN impedance at higher DC currents. Two ways ''test'' or ''simulate''. I have not done this but believe ''test'' can be done using a DC coupling/decoupling circuit. If I look up the chebychev tables for a 3 element high pass with series caps and parallel inductor; then combine the cap values, it would be a 400nF cap and 1mH inductor. Combine both caps so that we have an L circuit, cap to block at the input and L to enable application of the test current, then same at the output but reversed. Inductor value is too high so it is too hard to realise. So all of the above LTSpice data and ''simulate'' would be the best way.
--- End quote ---
Maybe Jay_Diddy_B, our LTspice expert, can give this a try if he has some time to spare on this ? :)
--- End quote ---
Simulating inductance (let alone impedance) under bias is essentially a useless problem:
- Absolutely, positively no one publishes inductor models of that detail.*
- If you have construction data (sometimes**), and can find core data from that manufacturer in turn, you might be able to construct a model for losses and saturation.
- But good luck figuring out losses and inductance as a function of amplitude and bias; in general, you can expect both to vary, but even the core manufacturers don't tell you jack about this (and quite possibly, don't even know, themselves).
- And anyway, analyzing and quantifying all of this is *really* hard. You get into "butterfly" B-H curves, minor hysteresis loops (which need not be proportional to the full B-H loop), frequency dependency (the size and shape of the loop varies with rate), and heck, might as well throw temperature into the mix as well. At this level, you're better off making an approximate model from measured data, rather than trying to build any kind of physics-based model.
*You can assemble a basic DCR + L || Rloss || (Rc + Cp) model from standard datasheet values (DCR, L, Q @ F, SRF), with presumably at least gross agreement to a little above SRF. Few manufacturers give L(F) or Z(F) curves, and even fewer give SPICE models. Of note, Kemet and TDK have some data available for their capacitors and inductors, though these are usually prepared at a given frequency; and CoilCraft has extensive data (including a slightly more complicated, more accurate AC model) on probably more than half their product line.
I haven't seen a single model published, ever, that claims to address core saturation, for a given commercial part. (There are simple SPICE models for this -- but, you're doing the parameter fitting yourself.)
**So far, I've asked Bourns and Murata for data on single occasions, and gotten useful enough answers. YMMV.
So for the present case, I would be more than happy to accept a much more basic problem: does the effective inductance, of the main series inductor, remain within tolerance, at rated current? And this can sometimes be found in the datasheet already, or calculated from core data.
Tim
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