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Example of why people say you sholdn't use MOSFETs in parrallel as dummy load
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David Hess:

--- Quote from: fourfathom on June 19, 2022, 12:20:36 am ---The source resistors are a good idea, but remember that the MOSFET RDSON has a positive tempco, so the imbalance you are seeing will not be as bad when the transistors are all sharing the same heatsink.
--- End quote ---

MOSFET RDSON has a positive temperature coefficient in saturation.  In the linear range, the temperature coefficient reduces to zero as the drain-to-source voltage increases and then reverses becoming negative.


--- Quote from: Caliaxy on June 19, 2022, 06:19:26 pm ---Manually selecting them for matched Vgs wouldn’t hurt either.
--- End quote ---

Grading them for matched Vgs helps considerably and reduces the required source ballast resistance.

The Siliconix MOSPOWER application book has an example showing how to calculate the required ballast resistance for a given Vgs mismatch and thermal resistance.  If the power is derated sufficiently, then no source ballast resistance is required.
jusaca:

--- Quote from: fourfathom on June 19, 2022, 12:20:36 am ---The source resistors are a good idea, but remember that the MOSFET RDSON has a positive tempco, so the imbalance you are seeing will not be as bad when the transistors are all sharing the same heatsink.

--- End quote ---
Wouldn't the imbalance be even higher with a shared heatsink? The FETs that are already carrying a smaller current will get hotter from the shared heatsink and get to a higher resistance. This leads to an even smaller current through these FETs.
fourfathom:

--- Quote from: jusaca on June 20, 2022, 03:03:55 pm ---
--- Quote from: fourfathom on June 19, 2022, 12:20:36 am ---The source resistors are a good idea, but remember that the MOSFET RDSON has a positive tempco, so the imbalance you are seeing will not be as bad when the transistors are all sharing the same heatsink.

--- End quote ---
Wouldn't the imbalance be even higher with a shared heatsink? The FETs that are already carrying a smaller current will get hotter from the shared heatsink and get to a higher resistance. This leads to an even smaller current through these FETs.

--- End quote ---

Yeah, probably.  I've already been corrected on this (VGS negative tempco dominates anyway), but I was reading that (many?) power-FETs are essentially many paralleled drain-source channels on one piece of Si, and in addition to the intrinsic matching it's the positive tempco that keeps the current equally distributed.  But now that I consider this, the only way this works if there is some amount of thermal isolation between channels.  So my heat-sink comment was doubly wrong.
MK14:
The following app note, seems to shed some light on such a MOSFET situation.  No quotes from it, as there are too many details to easily summaries it.  Without risking confusion.

https://assets.nexperia.com/documents/application-note/AN11599.pdf

EDIT:  But here is a bit, anyway:
From "5. Partially enhanced (linear mode) power sharing".

--- Quote ---This behavior is due to the Negative Temperature Coefficient (NTC) of gate threshold
voltage VGS(th). As the group of MOSFETs starts to enhance, the MOSFET with the lowest
VGS(th) starts to conduct channel current first. It dissipates more power than the others and
heat up more. Its VGS(th) decreases even further which causes it to enhance further.
This unbalanced heating causes the hottest MOSFETs to take a greater proportion of the
power (and get even hotter). This process is unsustainable and can result in MOSFET
failure if the power is not limited. Great care is needed when designing paralleled power
MOSFET circuits that operate in the partially enhanced (linear mode) condition
--- End quote ---
David Hess:

--- Quote from: jusaca on June 20, 2022, 03:03:55 pm ---
--- Quote from: fourfathom on June 19, 2022, 12:20:36 am ---The source resistors are a good idea, but remember that the MOSFET RDSON has a positive tempco, so the imbalance you are seeing will not be as bad when the transistors are all sharing the same heatsink.
--- End quote ---

Wouldn't the imbalance be even higher with a shared heatsink? The FETs that are already carrying a smaller current will get hotter from the shared heatsink and get to a higher resistance. This leads to an even smaller current through these FETs.
--- End quote ---

Thermal coupling between the MOSFETs helps to balance the current whether the temperature coefficient is positive in a switching application or negative in a linear application.

In most applications, the effect of differential heating in linear operation is to make the problem worse. One way to minimize the effect of asymmetrical currents is to maximize the thermal coupling between the devices (make Rc as small as possible). This is the same conclusion reached for parallel devices operating as switches!

- Siliconix MOSPOWER Applications, 5.3 Parallel Operation of Power MOSFETs (TA 84-5), Page 5-20
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