Author Topic: FeelTech FY6600 60MHz 2-Ch VCO Function Arbitrary Waveform Signal Generator  (Read 328625 times)

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Offline DaveR

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Re: FeelTech FY6600 60MHz 2-Ch VCO Function Arbitrary Waveform Signal Generator
« Reply #875 on: February 27, 2018, 03:08:11 pm »
Hi Propretor,

The instances of dead devices appear to be restricted to those with firmware versions 3.0 amd 3.1 only.  So far, there are no reports of any problems with version 3.2 so we hope that Feeltech have corrected the fault.  It was the dead devices which prompted the urge to reverse engineer the device and try to develop a better, more stable firmware for it.

The power supply issues don't appear to be linked to the firmware problem, so you can do as little or as much to it as you like - but bear in mind that not doing enough has the potential to lead to the death of other devices you connect to it!

Regards,
Dave
« Last Edit: February 27, 2018, 07:57:09 pm by DaveR »
 

Offline DerKammi

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Re: FeelTech FY6600 60MHz 2-Ch VCO Function Arbitrary Waveform Signal Generator
« Reply #876 on: February 27, 2018, 08:04:01 pm »
How is this for version control. Both are V1.501 boards. Just spotted a subtle difference.
 

Offline soundtec

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Re: FeelTech FY6600 60MHz 2-Ch VCO Function Arbitrary Waveform Signal Generator
« Reply #877 on: February 27, 2018, 08:46:57 pm »
Aside from a different clock chip ,I can also spot a missing smd resistor on the second board ,
 

Offline bsudbrink

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Re: FeelTech FY6600 60MHz 2-Ch VCO Function Arbitrary Waveform Signal Generator
« Reply #878 on: February 27, 2018, 08:49:01 pm »
Immediately above L1, the via was widened into a test point and a flood fill area was added.
 

Offline soundtec

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Re: FeelTech FY6600 60MHz 2-Ch VCO Function Arbitrary Waveform Signal Generator
« Reply #879 on: February 27, 2018, 08:49:54 pm »
Oh yeah, couple of extra pads closeby the clock on the second board too ,I wonder which one was the latest revision ,were they both shipped with the same firmware as well ?
 

Offline DerKammi

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Re: FeelTech FY6600 60MHz 2-Ch VCO Function Arbitrary Waveform Signal Generator
« Reply #880 on: February 27, 2018, 08:59:40 pm »
Both V3.2.

The one with the testpad it is not connected anywhere. The one with the via is connected via R16 to the FPGA.

Both are coming from the HC245 and are buffering via J11 the VCO in signal. But the connection is made to J10 to the VCO in so this whole signal is useless.
« Last Edit: February 27, 2018, 09:03:43 pm by DerKammi »
 

Offline DerKammi

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Re: FeelTech FY6600 60MHz 2-Ch VCO Function Arbitrary Waveform Signal Generator
« Reply #881 on: February 27, 2018, 09:30:23 pm »
Had some schematic capture activity as you may have guessed. 98% is in. Missing are the decoupling caps around the FPGA and the 2 jumper pairs. Also the counter input is missing.
 

Offline seronday

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Re: FeelTech FY6600 60MHz 2-Ch VCO Function Arbitrary Waveform Signal Generator
« Reply #882 on: February 27, 2018, 11:15:43 pm »
   If anyone with a 15Mhz or 30Mhz version of the FY6600 needs to generate a waveform with a higher output frequency, this can be done by creating an arbitrary waveform of 2 or more cycles.

For example using the FeelTech PC software, create an arbitrary sine wave of 4 cycles and load this into the FY6600.
When this wave form is generated, the output frequency will be 4 times what the FY6600 frequency is set to.
So if the frequency is set to 15Mhz, the output will be 60Mhz.

Keep in mind that the limitations of the DA converter and output op amps still apply.

Regards.
 
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Offline soundtec

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Re: FeelTech FY6600 60MHz 2-Ch VCO Function Arbitrary Waveform Signal Generator
« Reply #883 on: February 27, 2018, 11:51:04 pm »
That Schem is looking real good Derkammi,
Great work .

Hi Seronday,
That sounds like a really neat trick ,isnt it funny how sometimes lateral thinking can provide a simple solution to what seemed like a much more difficult problem, I cant wait to test it out tomorrow . Mr Feeltech wont be happy  |O :-DD

I got out my metal snips today and made a sheild for the PSU section .I used the two screw holes where the original power supply attached to mount the bulkhead.
 

Offline DerKammi

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Re: FeelTech FY6600 60MHz 2-Ch VCO Function Arbitrary Waveform Signal Generator
« Reply #884 on: February 28, 2018, 06:24:09 am »
Also made a small update of the front panel schematics as the unknown signal PA0 is actually the VCO_IN, so the ADC of the micro is used.
 
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Offline fremen67

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Quick update: Phase 1 is almost over  :)
The basic functions are working with my dev board. I have now to swap it with a bluepill board and create a profil for it in my project.
I also have some modifications on PC Software to do as I added 18 new commands to the official serial protocol. I will add a switch to inhibate new functions so this could still be compatible with official FY6600.
I finally added the configurable min/max output limits for DUT protection and inhibated the offset for CMOS and Adj-Pulse.
If everything goes right, this might be over before end of this week.
I'm a machine! And I can know much more! I can experience so much more. But I'm trapped in this absurd body!
 
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Offline DaveR

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Your status as a Living God will soon be confirmed, fremen  :)
 

Offline sdouble

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say half-god for the moment  ;)
 

Offline DC1MC

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Or demi-god, sounds more French  ^-^, but seriously, I'm impressed in the best way possible, and Feeltech should be as well, we've managed to rescue their almost failed project, if this thing we'll have an open-source panel firmware, there in no other better development and experimentation platform. I mean of course, you can get a solid AWG from somewhere else, but it will just be a box without any possibility of improvement or self-improvement of the owner.
This little plastic gadget offers so much more, if one just wants to use it, soldering a socket and wire is not a problem, if it wants to go to the next level, there are a lot of things to be done to get increasingly better performance and train yourself in electronics, mixed signal processing and, most important, fine soldering and a bit of mechanics ;). And let's not forget, a lot of software is available and get's better by day.

I went 2 days to the Embedded World, and the future of affordable TE is indeed Chinese, the established elephants and gorillas increasingly isolate themselves and see their market share dwindling. Hell, even Owon came with some nice models.
And I've really liked the new SA with VNA from Siglent, they won't send me one as I don't have a YT channel, but Dave's it's on its way ;), and the kid in the booth told me winking that "our products remain software unlockable", so it's nice to see what will come out of it.

 Cheers,
 DC1MC
 

Offline DerKammi

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Yes the Chinese are gaining very fast. They are not the master of copying any longer but are more the creators of stuff these day.
They even will beat the Germans in soccer in due time. I don't want to talk about the Dutch team past years :(

But I'm more anxious about fremen67 his software luckily.
 

Offline paulca

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With regards the software being produced in this thread.

Did the author have any access to the original code?  Was that code copyrighted?

If the answer is yes to both then it cannot be legally open sourced without the copyright owners permission.  Doing so could result in a "cease and desist order" or court at worst.

Of course this depends on the license agreement under which Feeltech shared the code.

To open source software via reverse engineering it must be done in white/clean room conditions with no access to the original code.
"What could possibly go wrong?"
Current Open Projects:  3 Channel Audio mixer with DAC, BT, pre-amps and h/phone amp, WS281x LED controller Version 2 5V/5A w/Atmega328, FY6600 Power supply, 5A DC Load (Still!)
 

Offline DerKammi

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Written from scratch with reverse engineering the protocol between the µC and the FPGA.
 

Online khach

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Any idea about unpopulated U302 IC? Is it possible that U302 is PLL clock generator for jitterless mode operation? Of course, different FPGA core design need for that mode.
 

Offline soundtec

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Re :copyright possible legal issues.

I see no Eula section when I load up the Fy6600 computer control software .

I think its fair to say Feeltech will certainly be keeping an eye on developments here ,even though they stopped contributing to the post a good while back . At any rate once Fremens work of genius is complete ,theres nothing to stop Feeltech pinching the code back and upgrading the functionality of the fy6600 with it , If I was them I'd be considering offering Fremens a consultancy position as software developer.
My guess is feeltech are more concerned about other rival companies producing hardware very similar to their own ,end of day what were doing here will only increase the desirabillity and sales of their product , any attempt by them to shut down our efforts here wouldnt do them any good at all .
« Last Edit: March 03, 2018, 01:46:50 am by soundtec »
 

Offline bitseeker

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To open source software via reverse engineering it must be done in white/clean room conditions with no access to the original code.

Good news! FeelTech won't share their source code.
I TEA.
 

Offline zov

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Hello for everybody! It's my first post on the forum and in this thread. Sorry in advance for my poor English, not my native language.
I've been reading this thread since I decided to order FY6600 in the beginning of the year,  a lot of useful infos here!
I have got my unit at February 16, played with it and now decided to join to the forum and to this thread particularly.
First some remarks about the generator as is without any modification. I got it from ebay (echoii_shop), luckily version 3.2, board revision 1.501.
The generator works normally with quite decent calibration: 5.04Vp-p , 30mV offset (5Vp-p, 0V offset, 10kHz sine  settings).
The timebase is a pretty accurate also: -4 ppm after 30 min warm-up with +/-100 ns jitters, planning upgrade generator anyway.
An interesting thing is the switching power supply. As I can see it is a new variant. It has the same problem of leakage current: 90Vac relative PE (my mains is 230V).
But when I measured output voltages I was surprised: +5V under load was exactly +5Vdc (4.9976Vdc on my Fluke 289), and higher voltages were  +12.04Vdc
and -12.08Vdc . In standby mode voltages were +5.0000V :-DMM, +11.877V and -11.940V respectively. And absolutely no adjustment components in the unit :-//!
So no dangerous output voltages in any mode. I check output pulsations, 30mVp-p on +5V bus that is well enough and much worse 300mVp-p on +/-12V buses.
Think I could live with this PSU after modifying it to eliminate the leakage current problem of course.
Now more interesting part of my post ;). I am a quite experienced designer of FPGA based systems, particularly of Altera's repertoire. 
So I can make a few educated conclusions about main board of the generator.
1. As someone already found CycloneIV get its configuration from Winbond's flash and this configuration data is located in the beginning of the chip. Judging by its size
   configuration data are uncompressed. Configuration for Altera's FPGA can be in compressed form that may occupy 30-50% less of memory if we decide to make our own design.
  No problems to write a new configuration by USB interface through the front panel MCU as FPGA has full access to the flash. There're two possibilities:
  MCU can rewrite a portion of the flash with configuration data (if I got it right MCU can write into flash addresses) they are not used after configuration was load.
 But if something goes wrong we get a brick that can be revived only by programming flash with a dedicated cable. So more advanced perspective.
 CycloneIV has remote upgrade mode. In it there are few configurations: one factory one that is never erased and one or more application configuration. The factory configuration is
 load on power-up reset and after it can load any specified application configuration. This process can be controlled by FP MCU. If loading of the application configuration fails
 the chip returns to the factory configuration with indication of a reason for error. So the factory configuration can be used for writing a new working configuration into the flash
 and starting this new configuration after it or after power-up reset. In this case we will always have a fallback procedure if something goes wrong.
 And now main question: for what could we be wanting to modify generally quite good design? Some thoughts.
2. We can enhance square wave generation providing settings for rise/fall times. Concerning 4ns jitters of edges not much can be made here as PLL circuit in the chip is quite limited,
   it can provide frequency Fref *M/N where M,N=1..512, too coarse for any decent frequency resolution. CycloneV has fractional PLLs which could provide a frequency resolution of
  order of a part of a Hertz in our case but we have CycloneIV :(.
3. But PLL in CycloneIV allows easily to use TXCO quartz generator of 10MHz that can facilitate upgrade to external 10MHz precision time reference. Moreover the PLL in CycloneIV can be
   reprogrammed in running chip without reloading of configuration, so we can adjust the same configuration for different reference clocks by MCU in working system.
4. We can add new functions. In the flash can be written a stream of bits (128K at most) instead of an ARB waveform. And that stream can be output as CMOS pulses or any other pulses bit by bit
   with set frequency, amplitude and etc or used as modulating signal for carrier signal (ASK? FSK and so on). It would be useful for testing and debugging digital systems particularely
  digital data transmission ones.
5. Use sigma-delta modulation to get more resolution from DAC when generating lower frequency signals. But I am not sure here as DACs are already overclocked
and might have not very good linearity. This requires additional investigation, unfortunately I haven't got relevant test  devices for it.
6. Something else....
If there is an interest in the community I could contribute to such efforts.
 
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Offline rhb

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It's hard to find words.  Welcome and thanks for joining the conversation.

If corrections calculated at audio frequencies were found to be applicable at higher frequencies I think we should be able to correct DAC linearity errors by means of a soundcard and a test program which generates predistorted waveforms,   But I know little or nothing about the DAC side of things.  If the errors vary with frequency it would still be possible to correct the errors using data from a DSO.

 

Offline soundtec

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Welcome Comrade Zov ,

Im sure your expertise and familiarity with the Altera series will be definate bonus to our mission .
My Russian language skills are non existant ,not to mention the cyryllic script which I can not pronounce .
And actually the only thing that stopped me from becoming lost forever on a trip on the Moskow underground was a helpfull person who wrote down  the name of the station I needed to get to phonetically in roman alphabet .
Anyway several of your fellow countrymen are involved already so Im sure we can iron out any glitches in the language matrix . 8)
 

Offline DerKammi

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Zov, great post. Equally great to have a Russian on board with Altera skills. A lot of Russians with hacking skills in my opinion so this me be gold to have.

I did know that we could configure the FPGA at boot with the SPI bus as slave and master but I don't know if the reading of the arb signals is done bij a NIOS core or that we just fill some memory where we write with the STM32 and the FPGA just read this part.

But writing a new config for the FPGA is beyond my knowledge, I can read read what is done by others but writing from scratch is to much.

1.   Is there a way to read the config from a non compressed config data? or is this still encrypted in some way as I have read some CycloneIV datasheets.
2.   2,3 and 5 together as we have a new config we also can reduce the clock and not overclock the DAC to reduce the low linearity and take advantage of the better fractions available to reduce jitter.
3.   This sounds very interesting I must say, this would mean a huge upgrade to the whole ARB system currently used. I guess we need to generate signals on the fly with some power from the micro. Really use the 72Mhz of the CPU.

I truly hope you stay aboard to make this "dev" board the greatest AWG for the the price. Together with fremen76 his efforts this would be possible.
« Last Edit: March 03, 2018, 07:04:41 am by DerKammi »
 

Offline fremen67

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Here it is. Finally the first release for Blue pills. :)

More comments later on. I will be back this evening. Enjoy!
I'm a machine! And I can know much more! I can experience so much more. But I'm trapped in this absurd body!
 
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