Edit: The command 0x38 with data 0xEA 0x60 I found is in yet another section of the code, where it handles other errors the system might encounter. (FUN_8001c138) Apparently it can detect failure of "AD9288_1_2"
That function is something like a Check_HW. See below:
int Check_HW()
{
int result; // r0@1
int v1; // r0@2
int v2; // r0@2
int v3; // r0@2
int v4; // r0@2
int v5; // r0@2
int v6; // r0@2
int v7; // r0@2
int v8; // r0@2
int v9; // r0@2
int v10; // r1@2
int v11; // r0@2
int v12; // r4@2
signed int v13; // r0@8
int v14; // r0@13
int v15; // r4@14
const char *v16; // r0@15
int v17; // r0@24
int v18; // r0@24
int v19; // r0@24
int v20; // r0@24
result = sub_8002330C();
if ( result != 2 )
{
v1 = sub_80027D88();
v2 = sub_8000690C(v1);
v3 = sub_80009658(v2);
v4 = sub_80001314(v3);
v5 = sub_8000689C(v4);
v6 = sub_800095E8(v5);
v7 = sub_800068D4(v6);
sub_80009620(v7);
sub_80012A4C();
v8 = sub_800267E8();
sub_80002790(v8);
sub_80026808();
sub_800267C4();
v9 = sub_80026828();
v11 = sub_8000696C(v9, v10);
sub_800096B8(v11);
FPGA_write_cmd(0x38u);
FPGA_write_data(0xEAu);
FPGA_write_data(0x60u);
sub_80017778();
sub_80019704(0);
sub_80018F6C(0);
sub_80019730(off_8018B738);
sub_800197C8(0);
FPGA_write_cmd(6u);
v12 = (FPGA_read_data() << 8) & 0xFF00; // Check_FPGA
if ( (FPGA_read_data() | v12) != 0x1432 )
{
sub_80019704(0xFF0000);
print_msg((int)"FPGA", 30, 90);
print_msg((int)"Failed", 100, 90);
while ( 1 )
;
}
sub_80019704(0xFFFFFF);
print_msg((int)"FPGA", 30, 90);
print_msg((int)"OK", 100, 90);
sub_80017CE0();
if ( Check_Encrypt() != 0x8150 )
{
sub_80019704(0xFF0000);
print_msg((int)"Encrypt", 30, 110);
print_msg((int)"Failed", 100, 110);
while ( 1 )
;
}
sub_80019704(0xFFFFFF);
print_msg((int)"Encrypt", 30, 110);
print_msg((int)"OK", 100, 110);
v13 = Check_AD9288();
if ( v13 != 3 )
{
if ( v13 != 1 )
{
if ( v13 != 2 )
{
sub_80019704(0xFF0000);
print_msg((int)"AD9288_1_2", 30, 130);
print_msg((int)"Failed", 120, 130);
while ( 1 )
;
}
sub_80019704(0xFF0000);
print_msg((int)"AD9288_1", 30, 130);
print_msg((int)"Failed", 120, 130);
while ( 1 )
;
}
sub_80019704(0xFF0000);
print_msg((int)"AD9288_2", 30, 130);
print_msg((int)"Failed", 120, 130);
while ( 1 )
;
}
sub_80019704(0xFFFFFF);
print_msg((int)"AD9288", 30, 130);
v14 = print_msg((int)"OK", 100, 130);
if ( !Check_Analog(v14) )
{
sub_80019704(0xFF0000);
print_msg((int)"Analog", 30, 150);
print_msg((int)"Failed", 100, 150);
while ( 1 )
;
}
sub_80019704(0xFFFFFF);
print_msg((int)"Analog", 30, 150);
print_msg((int)"OK", 100, 150);
sub_80019704(0xFFFFFF);
print_msg((int)"Touch", 30, 170);
print_msg((int)"...", 103, 167);
v15 = Check_Touch();
if ( v15 )
{
sub_80019704(0xFFFFFF);
v16 = "OK ";
}
else
{
sub_80019704(0xFF0000);
v16 = "Failed";
}
result = print_msg((int)v16, 100, 170);
if ( v15 )
{
sub_80019704(0xFFFFFF);
print_msg((int)"Hard Checked Successful !", 30, 190);
v8019D5A3 = 0;
v8019D5A6 = 300;
v8019D5AF = 0;
v8019D5B2 = 100;
v8019D5AA = 19;
v17 = sub_8000696C(0x8019D5A0, 0);
v18 = sub_800096B8(v17);
v19 = sub_8000689C(v18);
sub_800095E8(v19);
v20 = sub_800266C4();
sub_80025BB0(v20);
result = sub_8000BC00(500);
}
}
return result;
}
So, they check (by this order):
1 - FPGA // ID ??
2 - FPGA_Encrypt // Checksum ??
3 - AD9288
4 - Analog
5 - Touch
If all is well it returns: "Hard Checked Successful !"