### Author Topic: Fy6800 vs Fy6900  (Read 19092 times)

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#### bdunham7

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##### Re: Fy6800 vs Fy6900
« Reply #50 on: July 13, 2019, 08:21:51 pm »
So look at the pictures and tell me how they agree or disagree with your theoretical explanations.

Theory predicts SNR = 40 dB at 9.8 MHz sine wave for RMS jitter 160 ps (it's your measurement for 9.8 MHz square wave).

Your picture shows a little worse performance, at 9.8 MHz SNR is about 25 dB or something like that.
The worse performance in reality can be explained by not enough precision of your equipment.
Probably RMS jitter is more than 160 ps at 9.8 MHz.

And in overall my theoretical explanation pretty well corresponds with your pictures.

I don't think your jitter math will work here as you would expect.  First, we should define jitter, which could involve the generator sample clock, the scope/FFT trigger gate or the DDS process itself.  I am considering the jitter to be the variation in the timing of the rising edge of the waveform at the zero crossing point.  I've previously used quote marks to refer to the 4ns "jitter" because although it is based on a random displacement of the transition by +/- 2ns, it really isn't jitter as measured by the scope or as it would be seen by most devices looking at a clock signal.  How this 4ns sample spacing constraint affects the output varies wildly with frequency.

You shouldn't infer that all of the things you see on the FFT are a result of jitter (as I've defined it) or that a certain s/n ratio implies a certain level of jitter.  I think the variation if the falling edge of a square wave due to the 4ns effect is better characterized as distortion--but I'm not sure characterizing it helps us understand it any better.

Look at the 10 MHz square wave photos.  The period and width variations are pretty low, but on the FFT, in addition to the expected odd harmonics, you see peaks at 0, 20 and 40MHz.  Why?  Simple--even though the signal period is a multiple of 4ns, the expected falling edge transition occurs exactly in between samples, since 50/4=12.5.  The FY6600 makes the best of it by simply having the high period be consistently 48ns and the low 52ns--or a 48% duty cycle if  you will.  That's good for low jitter clock signal, but it bad for spectral purity--it causes the even harmonics and an 8% or so average DC offset.

So in the 9.8MHz case, jitter (as defined by me and as measured by the scope) goes up because the leap-nanosecond method doesn't yield uniform results, but it is still much closer than I expected.  However, every cycle of the waveform will be different than the last as far as the width the high and low periods and you get the result you see, which is the 2ns or so of pseudo-random variation in duty cycle .  That's not an equipment fault, this FFT can show clean single frequency peaks with a dynamic range of 80db or so.  In any case, the bulk of the pseudo-noise you see on the FFT is caused by the variation in the duty cycle from period to period, which I would characterize as harmonic distortion--but I'm open to better terminology if anyone has an idea.

Now the sine waves just don't have this particular issue.  You can see that the upper and lower halves of both sine waves have identical durations that are not multiples of 4ns.  I'm not saying the sine waves are perfect--they seem to have 65-70db noise floors.  This may be due to sample clock jitter, the DDS method used (linear interpolation?) or DAC non-linearity.  What they don't have is any evidence of the 4ns effect.
« Last Edit: July 13, 2019, 10:48:50 pm by bdunham7 »

#### Johnny B Good

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##### Re: Fy6800 vs Fy6900
« Reply #51 on: July 13, 2019, 09:51:16 pm »
4ns jitter is totally absent from sine waves and anything else based on sine waves

this 4 ns IS PRESENT on sine wave, but you don't see it on oscilloscope, because sine wave has too slow slope. You're need to use higher frequency sine wave in order to see it on oscilloscope. Or just use spectrum analyzer, it will show you this jitter (as parasitic spectral components) for sine wave on any frequency.

This picture will explain you why this 4 ns jitter is present on sine wave, but you don't notice it on oscilloscope:

That's a very nice picture you've provided. However, it does seem to be based on a false premise. I've looked quite closely at the sine wave zero crossing points. Increasing the Y amplifier gain is an effective way to steepen up the flanks of any waveform to unmask any such hidden DAC clock jitter artefacts. At best, all I can see is the usual random jitter noise present on all wave forms.

Only square waves and all others which likewise include a fast edge transient, have exhibited this DAC clock jitter artefact. If you possess one of these Feeltech signal/function/Arbitrary Wave generators (FY66/6800), a simple experiment can demonstrate these observations made by both bdunham7 and myself.

There's no need for a separate 10MHz high precision reference (that just adds another dimension to the observations), nor does the generator have to be upgraded to a better 50MHz clock oscillator. You simply set the frequency to 10MHz exactly and then apply a 10mHz offset which will effectively provide a strobing effect to reveal the 4ns jitter in slow motion. The signal generator's 50MHz clock doesn't even need to be calibrated, the results will be the same regardless.

Having set the frequency, you can now work your way through as many wave forms as you care to examine. You will need to observe each one for at least ten seconds at a time. You will also need to display several cycles worth on the 'scope display. For a ten MHz frequency, this means a setting around the 50ns per division mark in most cases.

If you can run this simple experiment, I'd be quite interested in your own conclusions as to what is actually happening. Mine for the most part are based on the basic theory of digitising analogue wave forms in a bandwidth limited system whose upper frequency limit resides below the Nyquist frequency limit.

All of the wave forms which don't include fast transient edges requiring in theory infinite bandwidth can be conveniently stored as an "Arbitrary Wave form" and clocked out at any frequency without distorting the waveshape since such waves (sines, triangles and other similarly curved waveforms free of any infinitely fast transients) are entirely scalable in their wave shape in both amplitude and their time base.

However, when it comes to the other wave forms possessed of a theoretically perfect infinitely fast transient such as ramps and square/rectangle waves where a less than perfect 7ns rise/fall time compromise has to be accepted, these must be being handled in a completely different way in order that the rise/fall times remain at 7ns regardless of their fundamental frequency (strictly, repetition rate) whether it's one milliHertz or ten MHz.

Since I'm no expert in DDS technology, nor have I studied it in any depth, I can only guess that such sharp edged waveforms which need to preserve  fixed rise and fall times regardless of repetition rate (frequency) are handled outside of the bandwidth/Nyquist frequency limited digital processing of the less demanding stored waveforms.

Since the stored arbitrary waveforms which have no such conflicting requirement to generate edges with a fixed rise/fall time regardless of frequency don't suffer from the 4ns jitter, courtesy of the bandwidth limited processing, you might imagine that storing a square wave as an arbitrary wave with a 7ns rise/fall on a 30MHz representation would solve the problem but a moment's consideration will tell you that when such a waveform is clocked out to produce a 3MHz square wave, it will have rise/fall times of 70ns, scaling to 700ns at 300KHz and a whopping 70μs at 3KHz.

Quite obviously, this idea is a non-starter. The method actually being used by Feeltech to preserve a 7ns rise and fall time at all frequencies has come with the less contentious penalty of a 4ns jitter which is a very respectfully low level of jitter compared to what was being accepted in high end professional test equipment costing hundreds of times more only a decade ago.

The jitter issue in such a cheap signal generator, clearly aimed at the hobbyist market, is not a deal breaker. In many cases it'll have little to zero impact on their use. In the rare cases where it does, most resourceful hobbyists will be able to cost effectively apply the work arounds that were once practised by the professionals only a decade or so back when their ten thousand dollar kit fell short of the tasks they were being put to.

At the end of the day, you get what you pay for and these Feeltech products give you a surprisingly large amount of value for your money. As to whether or not Feeltech / Feelelec have applied a firmware update to mitigate the 4ns jitter issue remains to be seen. In view of the lack of any mention of such a radical upgrade, I rather doubt it.

JBG

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##### Re: Fy6800 vs Fy6900
« Reply #52 on: July 13, 2019, 10:53:03 pm »
First, we should define jitter, which could involve the generator sample clock, the scope/FFT trigger gate or the DDS process itself.

I'm talking about total jitter of entire generator, which includes jitter sum of all it's components:

total_jitter  = sqrt( oscillator_jitter^2 + FPGA_jitter^2 + DAC_jitter^2 + NCO_jitter^2 +.... )

How this 4ns sample spacing constraint affects the output varies wildly with frequency.

yes,and this is why I calculated SNR degradation due to the jitter at specific frequency 9.8 MHz. On higher frequency it will be worse.

You shouldn't infer that all of the things you see on the FFT are a result of jitter (as I've defined it) or that a certain s/n ratio implies a certain level of jitter.

FFT includes fundamental, harmonics and spurs caused by jitter and non-linearities at analog frontend. Also it includes aliases of all these components which doesn't fit into first Nyquist zone of your scope.

Look at the 10 MHz square wave photos.  The period and width variations are pretty low, but on the FFT, in addition to the expected odd harmonics, you see peaks at 0, 20 and 40MHz.  Why?

Usually such components is a result of even-order nonlinearities in analog frontend. Such non-linear distortion can be caused by saturated MOSFET, diode or something like that. The better analog frontend, the smaller will be these components.

So in the 9.8MHz case, jitter (as defined by me and as measured by the scope) goes up because the leap-nanosecond method doesn't yield uniform results, but it is still much closer than I expected.

When your output frequency is divided from DAC sample rate with fractional part, there always will be jitter. Just because your frequency doesn't fit to DAC aperture. It doesn't matter - sine, cosine, square or triangle wave. Because problem in time rounding error and this problem is the same for any kind of waveform with specific frequency. You cannot fix this issue at fixed DAC sample rate.

In any case, the bulk of the pseudo-noise you see on the FFT is caused by the variation in the duty cycle from period to period, which I would characterize as non-harmonic distortion--but I'm open to better terminology if anyone has an idea.

Jitter always produces spurs and noise around fundamental.  And they are not "pseudo", they are real, and they are really present in the signal.

Now the sine waves just don't have this particular issue.

On your sine FFT I see spurs and grass around fundamental, they are product of jitter. And it should exists for any kind of waveform with frequency which divided from DAC sample rate with a fractional part.

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##### Re: Fy6800 vs Fy6900
« Reply #53 on: July 13, 2019, 11:08:24 pm »
That's a very nice picture you've provided. However, it does seem to be based on a false premise. I've looked quite closely at the sine wave zero crossing points. Increasing the Y amplifier gain is an effective way to steepen up the flanks of any waveform to unmask any such hidden DAC clock jitter artefacts. At best, all I can see is the usual random jitter noise present on all wave forms.

You cannot deceive nature and invent a perpetual motion machine.
In the same way you cannot deceive nature and produce jitter free sine wave which is clocked from the source with jitter.

The jitter doesn't linked to waveform, it is linked to time error. The jitter will be exactly the same for any kind of waveform. Because time error doesn't depends on waveform, it depends the fundamental frequency and DAC sample rate relation. You cannot eliminate it at fixed sample rate. It doesn't matter what kind of waveform you will use, the jitter will be there...

« Last Edit: July 13, 2019, 11:10:01 pm by radiolistener »

#### Johnny B Good

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##### Re: Fy6800 vs Fy6900
« Reply #54 on: July 13, 2019, 11:26:31 pm »
I  think it pays to be a little more hard-hearted with sellers.  You have 30 days from the last delivery date to file INR, and some of these guys will say anything to try and run the clock out.  This is seller honghong20, right?  I haven't received mine nor you yours, so I think it is possible that no packages have been sent.  Talk of refusing packages is pretty strange--you should NEVER refuse a package according to eBay--and the seller wouldn't want to incur the return shipping charges that would likely exceed the value of the transaction.

Thanks for that worrying advice (I think ).

I've only ever communicated via Ebay's INR Request system which advised me to try and resolve a solution with the trader and telling me I could raise the issue on the 19th if not resolved to my satisfaction by then.

I've seen mentions of delaying tactics being used by some Ebay traders so I am mindful of the issue. In this case, we're dealing with different traders (although possibly the same under two different names). I'm dealing with a trader with the name of "hgfurniture2018",  "Based in China, hgfurniture2018 has been an eBay member since 09 Jun, 2018", so just over a year in business. His feedback score is 4608 with a 98.6% positive Feedback rating.

I know that feedback ratings generally need to be larger than 99.8% to instil full confidence and I'm not sure whether a 13 month trading history is long enough to reduce the risk of a fly by night disappearing act being pulled - is it long enough?

Do Ebay monitor these negotiations or do you have to explicitly describe them when seeking their assistance? The email from Ebay suggests they're aware of the content of these communications so, maybe they do record them for 'posterity' to help resolve any disputes. If Ebay advise against refusing a delivery, that request should raise alarms if not an eyebrow or two.

I've replied to their suggested remedy with caveats of my own so I'm now awaiting their response before I query with Ebay their request that I refuse a second package turning up after they've sent a replacement to see if this is an acceptable action in this circumstance.

JBG

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##### Re: Fy6800 vs Fy6900
« Reply #55 on: July 13, 2019, 11:29:35 pm »
Quite obviously, this idea is a non-starter. The method actually being used by Feeltech to preserve a 7ns rise and fall time at all frequencies has come with the less contentious penalty of a 4ns jitter which is a very respectfully low level of jitter compared to what was being accepted in high end professional test equipment costing hundreds of times more only a decade ago.

This is just totaly wrong approach (to preserve 7 ns rise time in cost of spectral purity). This is the same as to perform sample rate reduction by using decimation with no filtering at all. It will leads to aliases, it is very known issue. The same thing happens here. This increased jitter on square wave is a result of missing filter (interpolation). And it leads to a jitter (aliases).

The picture from pantelei4 shows that jitter for square wave is much higher than it should be.

If it looks as more sharp slope on the oscilloscope, it doesn't means that it's better. Because such signal consists of additional non-harmonic frequencies and they will affect circuit where you planning to use such pseudo-square wave.

The only way to get more clean and better quality signal on the output is to use interpolation. Any other attempts, such as trying to "make 48% duty cycle", "preserve 7 ns rise time" are completely wrong and will leads to dramatic non-linear distortions. And these non-linear distortions are much worse than "smooth square wave" visual effect on oscilloscope.

There is nothing bad with "smooth square wave". This is completely normal. Because it is limited by analog bandwidth. You cannot make more wide bandwidth by using these tricks. All what you get is just non-linear distortions. Which is the real problem.

If FY6600 really uses such "tricks", like "48% duty cycle" and "preserve 7 ns rise time" then this is complete crap.

I am more inclined to believe that this is more a software mistake than a deliberate use of such bullshit.
« Last Edit: July 14, 2019, 12:07:59 am by radiolistener »

#### Johnny B Good

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##### Re: Fy6800 vs Fy6900
« Reply #56 on: July 14, 2019, 12:06:50 am »
That's a very nice picture you've provided. However, it does seem to be based on a false premise. I've looked quite closely at the sine wave zero crossing points. Increasing the Y amplifier gain is an effective way to steepen up the flanks of any waveform to unmask any such hidden DAC clock jitter artefacts. At best, all I can see is the usual random jitter noise present on all wave forms.

You cannot deceive nature and invent a perpetual motion machine.
In the same way you cannot deceive nature and produce jitter free sine wave which is clocked from the source with jitter.

The jitter doesn't linked to waveform, it is linked to time error. The jitter will be exactly the same for any kind of waveform. Because time error doesn't depends on waveform, it depends the fundamental frequency and DAC sample rate relation. You cannot eliminate it at fixed sample rate. It doesn't matter what kind of waveform you will use, the jitter will be there...

Yes, agreed, there'll always be some level of jitter (along with many other sources of imperfection in the DAC process). However, those residual effects aren't what's being discussed here, We're rather more concerned with the gross effects of the 4ns DAC clock jitter that afflicts the square wave and its close cousins in the waveform zoo when the frequencies selected aren't an exact multiple of the DAC clock frequency.

Since you haven't responded to my suggestion to examine what actually happens when you run some basic tests with an FY6600 or FY6800, I'm assuming you don't actually have either in your possession to run these tests (I'm assuming you do at least have a suitable 'oscilloscope to run such tests).

When it comes to hypothesis versus experiment, experiment trumps hypothesis every time. If you're arguing purely from the basis of theory or a hypothesis without any experimental observations to back up your assertion, then I'd prefer you to hold back on your advice until you do have some experimental results to back up your claims which, quite frankly are at odds with what is actually observed in practice. IOW, put up or shut up.

JBG

#### bdunham7

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##### Re: Fy6800 vs Fy6900
« Reply #57 on: July 14, 2019, 12:12:02 am »
That's a very nice picture you've provided. However, it does seem to be based on a false premise. I've looked quite closely at the sine wave zero crossing points. Increasing the Y amplifier gain is an effective way to steepen up the flanks of any waveform to unmask any such hidden DAC clock jitter artefacts. At best, all I can see is the usual random jitter noise present on all wave forms.

You cannot deceive nature and invent a perpetual motion machine.
In the same way you cannot deceive nature and produce jitter free sine wave which is clocked from the source with jitter.

The jitter doesn't linked to waveform, it is linked to time error. The jitter will be exactly the same for any kind of waveform. Because time error doesn't depends on waveform, it depends the fundamental frequency and DAC sample rate relation. You cannot eliminate it at fixed sample rate. It doesn't matter what kind of waveform you will use, the jitter will be there...

So here is where you are going wrong.

First, Nyquist says that I can PERFECTLY reproduce a sine wave (in theory) as long as my sample rate is more than 2x the fundamental frequency and my output filter completely removes all bandwidth above the Nyquist frequency.  In reality, of course, it is easier to use a higher sample rate because the output filters can be made more easily.

Second, the fact that the sample rate is not a multiple or factor of the frequency is completely irrelevant.  It can be ANY NUMBER more than 2X.  A sample rate that is not related to the frequency is NOT jitter.  All I have to do is accurately solve the equation f(x) = (amplitude * sin (frequency * 2 *pi *x)) with the appropriate constants for each sample point and my output will be perfect.

Third, even your assertion that you can't get a perfect sine wave from a clock with jitter is wrong, although in practice it would generally be true.  If you apply a technique used in Equivalent Time Sampling on some DSOs, you can have the samples at a more or less random rate (as long as it always exceeds Nyquist) as long as you are able to accurately measure the exact timing of the sample and apply the calculation to that time.  Obviously, if you expect the samples at one time but they occur at another, you have an error.  So if your calculations are based on exact 4ns samples and they occur at 4ns +/- 0.5ns, you'll have jitter.

You keep mentioning the "grass" around my signal on the FFT.  Yes, it's a bit noisy and I suppose some of it is sample clock jitter.  The FY6600 apparently doesn't shine in the clock department.  But I suspect that some of that is also that they are using a cruder interpolation to translate a stored sine wave rather than calculating 250 million sine functions per second on the fly.  But all in all it isn't a bad signal for a low-end machine and the sine noise is nowhere near what the square wave had.

And why, I have to ask, are you telling me that those very pronounced second and fourth harmonics on the 10MHz FFT are from a non-linearity in the analog section when they don't appear elsewhere and I clearly explained what causes them in this case?  Do you think my explanation is wrong?

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##### Re: Fy6800 vs Fy6900
« Reply #58 on: July 14, 2019, 12:17:42 am »
I'm assuming you don't actually have either in your possession to run these tests

yes, I don't have it, I planned to buy it, but later changed my decision because of this issue with jitter which is reported by other users. I thought this is just DAC aperture jitter. But pantelei4 shows that there is much worse issue with jitter.

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##### Re: Fy6800 vs Fy6900
« Reply #59 on: July 14, 2019, 02:26:35 am »
First, Nyquist says that I can PERFECTLY reproduce a sine wave (in theory) as long as my sample rate is more than 2x the fundamental frequency and my output filter completely removes all bandwidth above the Nyquist frequency.  In reality, of course, it is easier to use a higher sample rate because the output filters can be made more easily.

Yes, if you want to produce only clean sine wave, then this true. You're just needs to take into account that filter is just attenuates unwanted components, it doesn't removes it. Also analog filter has smooth slope. So, you're needs to keep this slope inside first Nyquist zone.

Second, the fact that the sample rate is not a multiple or factor of the frequency is completely irrelevant.  It can be ANY NUMBER more than 2X. A sample rate that is not related to the frequency is NOT jitter.  All I have to do is accurately solve the equation f(x) = (amplitude * sin (frequency * 2 *pi *x)) with the appropriate constants for each sample point and my output will be perfect.

This generator produces not only sine wave, but also square wave, so you cannot say that half sample rate is good enough to PERFECTLY reproduce a square wave.

When your sample rate is not integer factor of target frequency, all harmonics of square wave which is outside first Nyquist zone will be spread around (you can see it as a grass on your 9.8 MHz FFT). When your sample rate is integer factor of square wave frequency, all harmonics of square wave will fit each other (you can also see it as missing grass on your 10 MHz FFT). So, there is no need infinite sample rate to perfectly reproduce square wave, you can do it with sample rate which is integer factor of target frequency and first harmonic of square wave fits to first Nyquist zone

This is why "the fact that the sample rate is not a multiple or factor of the frequency" is a relevant issue here

The second issue here is that you're needs to synthesize required frequency for DAC sample rate. The problem here is that if sample rate is not integer factor of target frequency, your NCO will have jitter. The best you can do is to minimize it's effect. But in reality usual NCO has bad spurious performance due to different software limitations. So, the jitter will be there

And this is why it is also relevant for sine wave.

Third, even your assertion that you can't get a perfect sine wave from a clock with jitter is wrong, although in practice it would generally be true.  If you apply a technique used in Equivalent Time Sampling on some DSOs, you can have the samples at a more or less random rate (as long as it always exceeds Nyquist) as long as you are able to accurately measure the exact timing of the sample and apply the calculation to that time.

Equivalent Time Sampling cannot improve jitter performance. Even more ETS doesn't uses fixed sample rate. It uses sample rate with very small phase shift for every sampling cycle interval. Very interesting - how you're imagine the same approach for single DAC?

« Last Edit: July 14, 2019, 03:26:51 am by radiolistener »

#### pantelei4

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##### Re: Fy6800 vs Fy6900
« Reply #60 on: July 14, 2019, 07:01:19 am »
I don't have it, I planned to buy it, but later changed my decision because of this issue with jitter which is reported by other users. I thought this is just DAC aperture jitter. But pantelei4 shows that there is much worse issue with jitter.
I had all the budget models of DDS - MHS, JDS, FY. The square wave jitter is not on the JDS6600, only on the duty cycle 50%.

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##### Re: Fy6800 vs Fy6900
« Reply #61 on: July 14, 2019, 08:16:49 am »
what sample rate is used for DAC in FY6600?

#### pantelei4

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##### Re: Fy6800 vs Fy6900
« Reply #62 on: July 14, 2019, 08:23:17 am »
what sample rate is used for DAC in FY6600?
250MSa
« Last Edit: July 14, 2019, 08:31:37 am by pantelei4 »

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##### Re: Fy6800 vs Fy6900
« Reply #63 on: July 14, 2019, 08:43:25 am »
250MSa

OMG

DAC904 is 165 MHz according to datasheet, so it is very overclocked

Just tried to simulate square wave with NCO:
DAC sample rate: 250 MHz
NCO accumulator: 32 bits
FFT size: 256k  (selected to be more close to parameters from bdunham7 screens)
FFT window: Blackman Harris 4

And result looks pretty close to these FFT from bdunham7.

So, almost all these spurs are result of jitter
« Last Edit: July 14, 2019, 08:52:39 am by radiolistener »

#### FransW

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##### Re: Fy6800 vs Fy6900
« Reply #64 on: July 14, 2019, 12:41:46 pm »
Quote from: bdunham7 on Today at 06:21:51 am
First, we should define jitter, which could involve the generator sample clock, the scope/FFT trigger gate or the DDS process itself.

Check https://en.wikipedia.org/wiki/Jitter
for some aspects & definition.

Regards, Frans
« Last Edit: July 14, 2019, 12:44:49 pm by FransW »
PE1CCN, Systems Engineering, HP, Philips, TEK, BRYMAN, Fluke, Keithley

#### Johnny B Good

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##### Re: Fy6800 vs Fy6900
« Reply #65 on: July 14, 2019, 12:53:01 pm »
250MSa

OMG

DAC904 is 165 MHz according to datasheet, so it is very overclocked

Welcome to the Feeltech related fora, radiolistener

We've known this for some time (18 months or longer - ICBA to check out the early postings in the "FeelTech FY6600 60MHz 2-Ch VCO Function Arbitrary Waveform Signal Generator" thread which will be celebrating its 2nd anniversary on the 28th).

[EDIT] I started re-reading the FY6600 thread from the beginning (again! for the third time) and came across the relevant post (dated 4th Nov 2017) on the fourth page which had identified the DAC chip actually used (a finding that has never subsequently been over-turned).

https://www.eevblog.com/forum/testgear/feeltech-fy6600-60mhz-2-ch-vco-function-arbitrary-waveform-signal-generator/msg1340574/#msg1340574

Old news indeed!

This overclocking will, no doubt, aggravate the random jitter noise (pico seconds) on sine waves and cousins but has little to do with the 4ns jitter issue with square waves and its cousins.

I'm sure Feeltech must have checked out the over-clockability of these devices before going to the additional trouble of scrubbing the part numbers off. Maximum clock speed ratings on chips was (and to a slightly lesser extent still is) far from an exact science in their manufacture so the speed ratings tend to be rather conservatively specified on what speed capability is actually achieved in their production.

It's not unusual for the actual speeds to be double what the specifications say they are. Once the production processes have been fine tuned to allow the manufacturers to offer even higher speed options at a premium, they eventually reach a stage in their production when they they can no longer meet demand for the cheaper, lower speed part by using actual lower speed parts so land up having to mark say a 320MHz part as a 165MHz part in order to shift their product and still retain the extra profit on the parts with the higher marked speed (low and high performance parts all costing the same to manufacture anyway - there weren't, and aren't, separate production lines for 165 and 320MHz wafers, they are simply tested and selected from each wafer's yield).

This is a long established practice in the silicon chip manufacturing industry. Carry on serving the low end market demand by mislabelling the high speed parts to maintain sales even when you've gotten so good at making the premium priced parts that you no longer produce the low rated parts in any meaningful quantity and still collect from those customers prepared to pay the premium price in order to get a product that's guaranteed to meet their more stringent requirements. It's not dishonest exactly, it's more a case of putting the burden of select by testing on their cheaper customers' shoulders.

Feeltech, like any good 'manufacturer of cheap electronic goods' know this and will test and select ICs  individually or in batches, leaving the rare exceptions to be discovered in the later product QA testing phase.

If they've any sense, they'll test a 165MHz marked part they're planning on using at 250MHz by running it at 300MHz and at an elevated temperature such as 60 to 80 deg C (the innards of the FY6600 could reach 50 deg C on average with some parts reaching 70 deg C with the lid off). If you're going to risk a high returns rate on such a gamble, you'll be looking to make sure there's still a reasonable safety margin in such an 'overclocking' exercise on a significant and critical component. In short, the overclocking of that 165MHz part to 250MHz, is unlikely to be the issue it appears to be.

Obviously, there's still a risk of the customer receiving a unit where the DACs are right on the edge. If you think you may have been sold such a dud, I guess a simple way to check would be to monitor a square wave at exactly 10MHz where this 4ns jitter is theoretically absent, using a DSO with infinite persistence turned on to look for evidence of rogue 4ns jitter.

For added 'credit' repeat the test with a nice insulating blanket draped over the generator to raise the temperature to increase the thermal speed reducing stress on the DAC (and everything else around it) even further. Inserting a thermal sensor probe into the case, whilst a sensible precaution, is optional (although knowing the actual temperature rise would be a useful data point ).

JBG
« Last Edit: July 15, 2019, 06:45:41 pm by Johnny B Good »

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##### Re: Fy6800 vs Fy6900
« Reply #66 on: July 14, 2019, 02:58:50 pm »
Here is a new simulation with better resolution for DAC square wave output at 250 MHz for 10 MHz and 9.8 MHz with 32 bit NCO and no interpolation (just switch between max and min value).

It seems that the simulation result is almost identical with FFT measurements from bdunham7.

So, FY6600 definitely doesn't use interpolation for square wave.
Just simple NCO with 32 bit accumulator and simple min/max switch.

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#### bdunham7

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##### Re: Fy6800 vs Fy6900
« Reply #67 on: July 14, 2019, 05:26:33 pm »
Can you run the same simulation with 9.8 and 10.0 MHz sine waves?

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#### Johnny B Good

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##### Re: Fy6800 vs Fy6900
« Reply #68 on: July 14, 2019, 06:39:40 pm »
Here is a new simulation with better resolution for DAC square wave output at 250 MHz for 10 MHz and 9.8 MHz with 32 bit NCO and no interpolation (just switch between max and min value).

It seems that the simulation result is almost identical with FFT measurements from bdunham7.

So, FY6600 definitely doesn't use interpolation for square wave.
Just simple NCO with 32 bit accumulator and simple min/max switch.

Interesting. Those spectra show the expected odd harmonic peaks for a square wave. It's the in between peaks which are the undesired spurii.

The TLA "NCO" had a familiar ring to it but I had to go searching to refresh my memory (so many acronyms, so little time).

On a hunch I looked for a wikipedia article on DDS technology and found the NCO reference there which mentioned a link to their "Arbitrary waveform generator" article which neatly explains why we see the DAC clock jitter on square waves and other waves containing similar instantaneous transients but not on sine curved waves or triangles.

The only puzzling thing being the apparent high speed rise and fall times on square waves that are being passed through an anti-aliasing(reconstruction) filter with an LPF cut off frequency somewhere between 75 and 100MHz (both comfortably below the Nyquist frequency of a DAC running at a sampling rate of 250Msps).

I'm considering the possibility of the LPF cut off frequency being as high as 100MHz due to my seeing rise and fall times in the region of 3.8ns on a 200MHz BW scope with its own 1.8ns rise/fall time specification when viewing the Sinc-Pulse waveform at 10MHz.

Strangely, the square wave shows its usual 7.2nS rise/fall times which can be pushed to 4.5ns when modulating CH1 with an identical square wave from CH2. It seems the square waves aren't going quite as fast as they possibly can, yet still produce a 4ns sampling clock jitter.

[EDIT] I just tracked down the reference to this modulation trick

https://www.eevblog.com/forum/testgear/feeltech-fy6600-60mhz-2-ch-vco-function-arbitrary-waveform-signal-generator/msg1339581/#msg1339581

Re-reading it, the comments regarding every other relative of the square wave having 4.4ns edges is rather interesting. I wonder if the doubling up of the square wave's rise/fall times were a failed attempt on Feeltech's part to mask the 4ns clock jitter issue.

For further amusement, I increased the frequency by 10mHz on both channels to see what effect, if any, such modulation would have on the strobed 4ns clock jitter and saw no change, just the speed boost on the rise/fall times from 7.2 to 4.5ns. Trying this modulation of CH1 with CH2 trick using the Sinc-Pulse doesn't speed the transition times, only slow them down a little.

If you're looking to get the fastest possible rise/fall time pulse out of these function generators (and free of the DAC clock jitter to boot!), the Sinc-Pulse is definitely the clear winner (at least up to around a repetition rate of 20MHz or so - it starts getting messy much beyond that point).

JBG

PS

After trawling through more pages of the FY6600 thread, I came across this interesting titbit by Fremen67 back in February last year where he mentions that square waves etc are treated differently to the arb waveforms which confirms the conclusions over which waveforms suffer from the 4ns jitter and which don't. You need to read the linked posting to get the idea as to just what was going on in regard of reviving the FY6600s that had been bricked by the earlier version 3.0 firmware.

https://www.eevblog.com/forum/testgear/feeltech-fy6600-60mhz-2-ch-vco-function-arbitrary-waveform-signal-generator/msg1426803/#msg1426803

Re-reading the efforts being made to overcome Feeltech's utter contempt for those customers who had paid the price for their programming incompetence, impressed me by the sheer doggedness of Fremen67 and others in creating a solution that would not only overcome the issue of closed proprietary firmware that precluded any means of applying firmware updates but also offer a superior open source less Chinese user interface (specifically, their hallmark bad choice of font) which would support firmware updates/hacks to allow owners of the lower/cheaper spec 15, 20, 30 and 50 MHz models to upgrade to the 60MHz spec.

Sadly, Fremen67 disappeared in the middle of all this development effort, never to be heard from again (with some fearing the worst for his unexplained disappearance), and the project lost its momentum and ground to a halt despite the promise of being able to hand Feeltech's ass back to them on a plate.

The subsequent factory applied firmware updates on the later production remained free of any further fatal flaws relegating the original issue a matter of ancient history for myself and others who had been late to this particular party which sealed the fate of this open source firmware development effort.

From then on, it was back to the interrupted business as usual of the more practical hardware based improvement modification projects, mostly based on refinements to the earlier modifications that had previously been described. As some members here know full well, that two year old thread is still very active.
« Last Edit: July 15, 2019, 12:41:54 am by Johnny B Good »

#### bdunham7

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##### Re: Fy6800 vs Fy6900
« Reply #69 on: July 14, 2019, 08:52:21 pm »
Quote from: bdunham7 on Today at 06:21:51 am
First, we should define jitter, which could involve the generator sample clock, the scope/FFT trigger gate or the DDS process itself.

Check https://en.wikipedia.org/wiki/Jitter
for some aspects & definition.

Regards, Frans

I guess I didn't say that very well.  By 'define jitter' I didn't mean jitter as a general concept--I think we can just assume that we are all talking about periodic jitter here as that is pretty standard and in any case periodic jitter is what my scope measures directly.

What I'm getting at is that you can't simply state that a particular signal has a certain amount of jitter, you need to define the points at which you measure that define the period. I'm not talking about tracing the jitter back to its source, just examining the signal as it is.  If you have a device that is triggered by the rising edge of a clock signal, it makes sense to define the period as the time between zero crossings of the rising edge and jitter as the variation from period to period.  You can pick a different place to measure as long as you say what it is.  Failing to agree on this can result in vastly different results and I've come up with an example.

I'm imagining a system where you have an ADC used for audio recording at 192KSa/s and the sample-and-hold circuit is clocked to this signal, triggered on the rising edge.  I've set up a signal generator to produce a 192KHz square wave but with the duty cycle modulated by noise with a maximum deviation of 20%.  This is the first picture and you can see that the falling edge varies but the critical rising edge is stable and shows a few hundred picoseconds jitter.  Not great but good enough.  The next picture is an FFT of that signal and it shows a 192KHz signal with a lot of noise.  Without the modulation, the noise floor would be off the bottom of the screen.

So now we take the signal and simply invert it.  I did this by reversing the polarity of the signal generator, not the scope. The rising and falling edges swap places and now you have a very jittery signal, totally unacceptable for the purpose I stated.   However, if I change the trigger on the scope to the falling edge, it goes right back to the lower jitter number.  And, as expected, an FFT of the inverted signal is exactly the same.

This should all seem obvious, but maybe it isn't.  You can't look at an FFT of a signal and declare that it has a certain amount of jitter.  Jitter is not a single number that can be assigned to a signal without further qualification.  Equivalent jitter?  Some other term?  Maybe.  But here I've shown a simple example of a signal that may work very well as a low-jitter (or low-enough jitter) clock and yet shows huge noise on an FFT that is indistinguishable from jitter.  And the measured jitter varies by factor of 50 depending on what point you trigger at.
« Last Edit: July 14, 2019, 08:57:12 pm by bdunham7 »

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##### Re: Fy6800 vs Fy6900
« Reply #70 on: July 15, 2019, 12:22:21 am »
hello, after thinking about it I changed my mind, I just bought a Kkmoon FY6900 60mHz, it was not worth saving dollars from a 30mHz to a 60mHz, on aliexpress.com, I hope it arrives in good condition.
« Last Edit: July 16, 2019, 01:31:43 am by Adrian_Arg. »

#### Johnny B Good

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##### Re: Fy6800 vs Fy6900
« Reply #71 on: July 15, 2019, 07:33:33 pm »
hello, after thinking about it I changed my mind, I just bought a Kkmoon FY6800 60mHz, it was not worth saving dollars from a 30mHz to a 60mHz, on aliexpress.com, I hope it arrives in good condition.

Considering just how lightweight these devices are (just 700 grammes - the box and packaging will likely weigh as much, if not more), even if they're drop shipped from an aircraft at 10,000 feet sans parachute, they're likely to arrive unharmed due to their very low terminal velocity. The box might look a bit bashed but the FY6800 inside might only need a ribbon cable connector or two at most to be reconnected/reseated.

Apropos of ribbon cable connectors, if the unit fails to function when you try it out for the first time, it's well worth opening it up (four long screws in the base and an old credit/debit card for a spudger to unclip the top of the front panel from the lid) to check these connections out. A few recipients have discovered loose connectors flapping around when investigating such post delivery failures, no doubt more than likely from errors in assembly which managed to slip past Feeltech's QA testing programme

JBG

#### Johnny B Good

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##### Re: Fy6800 vs Fy6900
« Reply #72 on: July 16, 2019, 11:18:09 am »
Quote from: bdunham7 on Today at 06:21:51 am
First, we should define jitter, which could involve the generator sample clock, the scope/FFT trigger gate or the DDS process itself.

Check https://en.wikipedia.org/wiki/Jitter
for some aspects & definition.

Regards, Frans

I guess I didn't say that very well.  By 'define jitter' I didn't mean jitter as a general concept--I think we can just assume that we are all talking about periodic jitter here as that is pretty standard and in any case periodic jitter is what my scope measures directly.

What I'm getting at is that you can't simply state that a particular signal has a certain amount of jitter, you need to define the points at which you measure that define the period. I'm not talking about tracing the jitter back to its source, just examining the signal as it is.  If you have a device that is triggered by the rising edge of a clock signal, it makes sense to define the period as the time between zero crossings of the rising edge and jitter as the variation from period to period.  You can pick a different place to measure as long as you say what it is.  Failing to agree on this can result in vastly different results and I've come up with an example.

I'm imagining a system where you have an ADC used for audio recording at 192KSa/s and the sample-and-hold circuit is clocked to this signal, triggered on the rising edge.  I've set up a signal generator to produce a 192KHz square wave but with the duty cycle modulated by noise with a maximum deviation of 20%.  This is the first picture and you can see that the falling edge varies but the critical rising edge is stable and shows a few hundred picoseconds jitter.  Not great but good enough.  The next picture is an FFT of that signal and it shows a 192KHz signal with a lot of noise.  Without the modulation, the noise floor would be off the bottom of the screen.

So now we take the signal and simply invert it.  I did this by reversing the polarity of the signal generator, not the scope. The rising and falling edges swap places and now you have a very jittery signal, totally unacceptable for the purpose I stated.   However, if I change the trigger on the scope to the falling edge, it goes right back to the lower jitter number.  And, as expected, an FFT of the inverted signal is exactly the same.

This should all seem obvious, but maybe it isn't.  You can't look at an FFT of a signal and declare that it has a certain amount of jitter.  Jitter is not a single number that can be assigned to a signal without further qualification.  Equivalent jitter?  Some other term?  Maybe.  But here I've shown a simple example of a signal that may work very well as a low-jitter (or low-enough jitter) clock and yet shows huge noise on an FFT that is indistinguishable from jitter.  And the measured jitter varies by factor of 50 depending on what point you trigger at.

If you do the following experiment, you'll see that both edges of the square wave are equally effected by this 4ns DAC clock jitter (and also confirm that sinusoids are free of such defect).

Set both channels to exactly 10MHz (one of the 'golden frequencies, devoid of the 4ns jitter on square waves) and then dial in a minus or plus 10mHz offset on each channel. Set one channel for square wave and the other for sine wave output and choose a convenient Vpp setting for both (5Vpp works just fine). Observe the outputs on a 'modern' dual channel 'scope with a bandwidth of at least 50MHz so as to show a reasonable facsimile of the 10MHz square wave and trigger from the sinusoidal waveform.

What you'll see from this experiment is the reason why your FFT measurements show no difference between the apparent cases of this 4ns jitter only effecting either the leading or trailing edge of the square wave. The reason being that both edges are effected equally (even though alternately).

Unless edge jitter is so severe as to prevent your 'scope's triggering circuit obtaining a stable trigger, the edge it is triggering from will always appear to be "jitter free" with  all of the jitter component of both edges accumulated onto the non-triggered edge.

Keep in mind that in this case, the time period between rising edges and between falling edges will remain constant with this form of timing jitter simply switching the unequal duty cycle polarity at a rate which depends on the offset from the 'golden frequency'. Using in this case, a 10mHz offset allows us to observe in slow motion exactly what happens at the more typical KHz offsets from the 'golden frequency' where it all becomes a blur.

If you so desire, you can report your results and perhaps even thank me.

JBG

#### bdunham7

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##### Re: Fy6800 vs Fy6900
« Reply #73 on: July 16, 2019, 07:33:49 pm »
@JBG

I think we're talking of two different things.  My demonstration has nothing to do with the 4ns issue and wasn't even done on a Feeltech sig gen.  I'm demonstrating that you you can have two clock signals, one with no measured jitter (assuming a particular measurement point--in this case the rising edge) and one with a lot and both can have identical FFTs.

You should go one step further with your demo and see what the calculated RMS jitter is, if you have the feature.  You'll be suprised at how low this can be even when the deviations are due to the 4ns effect.  And try using 5 MHz as your 'magic' frequency because it is at 5 MHz that the FY6600 is truly free of the 4ns effect, as both period and duty cycle are times perfectly.

#### Johnny B Good

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##### Re: Fy6800 vs Fy6900
« Reply #74 on: July 17, 2019, 01:16:47 pm »
@JBG

I think we're talking of two different things.  My demonstration has nothing to do with the 4ns issue and wasn't even done on a Feeltech sig gen.  I'm demonstrating that you you can have two clock signals, one with no measured jitter (assuming a particular measurement point--in this case the rising edge) and one with a lot and both can have identical FFTs.

You should go one step further with your demo and see what the calculated RMS jitter is, if you have the feature.  You'll be suprised at how low this can be even when the deviations are due to the 4ns effect.  And try using 5 MHz as your 'magic' frequency because it is at 5 MHz that the FY6600 is truly free of the 4ns effect, as both period and duty cycle are times perfectly.

Thanks for that suggestion bdunham7, I'll run the experiment later and let you know the result.

Obviously, all waveforms will exhibit some level of jitter but it won't necessarily be of the 4ns DAC clock period kind we see quite clearly on square waves and related waveforms when not being generated at their 'Golden Frequencies' of, in this case, our dearly beloved FY6600 and its progeny.

Indeed, one could be forgiven for thinking the jitter noise, such as it is in the sine waveform output when observed with a DSO, is nothing more than the effect of analogue noise present in the output of any analogue oscillator from Colpitts to Wien Bridge.

Before I ran this test, I'd thought the suggestion to use a Schmidt triggered input gate with the sine wave output to generate a square wave at any frequency, sanitised of this 4ns clock jitter, may magically resurrect this clock jitter in a demonstration of "Sod's Law". Thankfully, it seems this trick is beyond the "Law", including that of Sod.

This "Use a clipped sine wave" trick had just seemed too easy to be true. Of course, whilst that's good for producing a 'jitter free' square wave, it still presents additional complexity[1] when other than 50% ratio square waves and one shot pulses are required (but let's just deal with one problem at a time,  ).

[1] Ranging from dc coupling into our external squaring box of tricks and varying the dc offset, to ac or dc coupling the sine wave into a more complex box of tricks with its own independent controls over duty cycle and 'one shottedness' (manual trigger or a programmable repetition rate or WHY), along with Vpp level settings.

JBG
« Last Edit: July 17, 2019, 01:20:01 pm by Johnny B Good »

Smf