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Hantek DSO1152S - Wont boot after firmware update

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aerra:
Hello. Here is my new DSO. The board is newer than posted in this topic, so attaching photos - may be interesting for anybody. FPGA is Cyclon IV, in WanaGo's held - Cyclon III






What is strange - the shields of input circuits are not soldered - what a bullshit?













UART has standart pinout


tinhead:

--- Quote from: aerra on August 17, 2014, 08:34:32 pm ---Hello. Here is my new DSO. The board is newer than posted in this topic, so attaching photos - may be interesting for anybody.

--- End quote ---

thanks for these great pictures (any chance to get originals with better resolution via PM?)


--- Quote from: aerra on August 17, 2014, 08:34:32 pm ---FPGA is Cyclone IV, in WanaGo's held - Cyclone III

--- End quote ---

and that's really surprise!

Any chance that you made backup of the NAND and share with me ? (PM)

aerra:
Yes, of'course. I outed the UART cable to battarey partition, so it's no problem to get backup (but i have to understand how to do it). Photos are 3MP, i'll sent them later.

tinhead:
that's cool thanks!

Knowing now that the latest "S" models (hw1.00.4) are S3C2416 SoC and Cyclone IV based no wonder that there was issues with latest firmware updates on older "S" models (hw 1.00.1 and hw 1.00.2).

aerra:
Trying to calibrate the  compensacion of probes using 1kHz scope's output  . Problem: native probes don't want to make a right meandr, in end position of probe's capacitor the meantr is still not right. I tried another probes and they are better. And one more - the meandr is bit different in AC and DC modes, on both channels. So it seems that input capacistances in AC and DC are different. Is it possible to regulate this? There are two variable capacitors in input circuit under the shield, turn them?
And is there a needence to solder the unsoldered sheelds of inputs?
(bad english, learning)

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