Hantek - Tekway - DSO hack - get 200MHz bw for free

[vlindos]

Very good guidelines tinhead. However I think I will leave this for later since the kit (parts costs) is bit pricey - more than 30 euro without the shipment. I'll see how ti goes after hours of usage and then will think about replacements. Btw have you measured the temperature before and after?
Btw you say the noise level would be lower... why ? How the PSU is related to the ADC measurement paths?

[tinhead]

Hi walt,
Have you tried actually that? Is there any more pictures?
Could you give us more information about the element - like picture of the main board?

... before ppl spend now time desoldering parts and measuring things which have none or only less influence on the noise i can already tell you where this noise is coming from.

In principle when more than one ADCs are used (and here we have up to 8th) the gain of ADC / channels must be identical. Now when you look
on the schematics you will see all refin/out of all ADCs are connected together - this is common practice for low budged DSOs but not the
best way (external ref with compensation would be better)

Then of course there is additional noise coming from not 100% exact calibrated input stage (you can't calibrate exact with given components),
and finally the overlcoked ADCs/bit noisy PSU/missing caps on ADCs are giving another part of the noise.

Now the gain difference is producing the major part, you can see it when you disable interleaving and disable all-1 ADC (this can be done by firmware patching and some
nice tricks - i don't want to talk about right now because these are more or less internal things which i observer/reversed and got confirmed by manufacturer - and they
of course don't want to talk about internal things in public - competitors are everywhere and watching). In principle all these AD9288/AD9481/HWD9481 scopes have exact the
same problems - some using bit more interpolation, some slowing down firmware to allow the scope to capture 2 waveforms (to avg a bit), other both things.
Interpolation filter can of course produce some digital noise from nothing when the calibration/gain is not perfect.

And yeah, all ADCs are clocked by FPGA - the jitter is giving the rest, the interleaving is not prfect anymore so no way to calibrate perfectly.
Sure the firmware is trying to arrange signals based on cross zero values while in factory calibration, but this is only static data,
temp drift, voltage drift, gain drift and signal type are dynamic.

But there is nothgin you can do in 5 mintues to get it solved. Sure you can repalce all ADCs by better/different models
(did it already - twice, first run was mistake as no chance to overlock new ADCs, second run - still not ready, need dedicated clocks for that),
replace FPGA clock source by extrem low jitter clock (did it already, bit less distortion for HF signals), evt. repalce complettly FPGA clock for ADCs by
dedicated clock chip (working on it now), add additional caps (did it),
improve input stage (did it), patch a bit firmware (did it) - but then you will realize that the total costs of such hacks/improvements doubled
the price of DSO. So when you don't  want spend money - take these DSOs (and now i mean UNI-T, HanTekway, RIGOL E ser.,
Instek A series, Tonghui, ATTEN, Siglent) as they are - low range but still good DSOs.

And before you ask - was it worth for me to imporve my DSO? Depends - from pure $$ point of view NO (i spend already ore than 1k USD for whatever was necessary to do my work)
from a fun point of view - sure i like my job, from a signal quality improvement point of view - YES.
Will i post improvement if they make sense? Maybe, depends on complexity, a dedicated clock PCB is nothing which can be done at home.
What i definitely will post is LAN addon for current platform (hw1007, should also work with hw1005).

Now Hantek spend of course some time too to find a way to imporve current hardware, the hw1007 calibration is taking a bit more care about potential gain
difference, i heard BM/BMV models will have additional improvement (what kind - no idea yet).

Anyway, if you don't lkie the noise - sell the scope and buy Agilent or the new Tektronix, sure they cost a bit more but as always, you get what you paid for.

[tinhead]

Btw have you measured the temperature before and after?

enclore temp right over PSU - before "hot", i remember someone measured it, but just disable fan and leave DSO
running for an hour, after - 32°, almost no heat from PSU.

bnc plugs temp - before very hot - again someone measurd it (don't remember where i saw it), now 34°

But it should be something between 20-30° difference. Sure fan will blow away part of that, but in my opinion fan is only
extra thing - you don't have to produce heat in first place.

Btw you say the noise level would be lower... why ? How the PSU is related to the ADC measurement paths?

google "ADC PSRR" and "Power Supply Effects on Noise Performance".

[vlindos]

Nice one - again! Great explanation. I am glad you are enjoying it.
I am not EE spec, and so if you are saying that it is too complicated to avoid the noise - then it is. Yes it makes sense to get for what you pay, but you ppl alway try get more. Just curiosity - how much you had been able to lower the noise ?
PS. Fully agreed for the hot source removal. And again great job - 32 degrees are nothing. Guess the engeneer(s) at Tekway was too much in hury (or not at your level - lol) to calc properly the things out. Few dollars above the price with your set of components for PSU might be saved from the old one + the fan.

[tinhead]

Just curiosity - how much you had been able to lower the noise ?

... a littlebit only. You will always have some small differences between produced units,
the environment EMV influence - but i would say 10% better than original DSO - see picture.

The target was to get levels like when 4 avgs enabled - so from that point of view i failed.

Guess the engeneer(s) at Tekway was too much in hury (or not at your level - lol) to calc properly the things out. Few dollars above the price with your set of components for PSU might be saved from the old one + the fan.

on low budget DSO market there are many competitors, you can be sure every manufacturer is calculating every cent,
a few dollars that's already very high difference. You can on the PSU PCB - the shotky diode cost less than bigger
heatsink and different LDO, so they chose a diode to reduce voltage, smaller heatsink and smalled LDO.
For a single unit of course everybody would say "no problem i would pay 20USD more to get this or that inside",
but actually 99% of buyers are looking on the price first - for 20USD less you will chose different distributor

[walt]

Have you tried actually that?

Sorry, I did not exactly put it above the post.

Not yet. Short the input to the ADC reference voltage, we can see that the noise of the input circuits or the noise of the ADC or mathematical artifact.
The easiest way to do it, unsolder the relay

I watched the oscilloscope input AD9288, and did not see anything special, but I have too much low-frequency oscilloscope, to the same single channel.

[vlindos]

Hi tinhead and walt!
I am glad there are people like you ready to help novice like me
Now .... tinhead if your screenshot is right you've got very different levels of noise. Without probe attached, pushed Auto Set button and then the measure menu I get:
Pk-Pk - 16 mV  - you get 160uV
Minimum -8 mV - you get 80uV
Maximum - 8 mV - you get 80uV

So you get 1% from the noise I have. If there is no mistake I think these are very significant results.
I am still way from the decision to do complicated mods to achieve these results but again from curiosity - How did you achieve it ? Using all of the the above explained  - including replacements of all of the 8 ADCs? Can you make a ordered list of what exactly you have done - it might be useful for other ppl like you? Also do you think that removal of the relay the way walt suggested would bring insignificant results?

PS. Just a side note. Do you think it would be too illegible if you start open source hardware project. Actually I am not asking for it. You made already enough. But you have lots of knowledge base about it and schemes it would be shame to be not shared (your mods over the original schemes).

[tinhead]

Without probe attached, pushed Auto Set button and then the measure menu ...

Do default setup, set 2us/div, set probe x1, set 2mV/div, set input to GND, enable 20MHz BW limit,
do stop, save screenshot and compare the pixels on picture - not measurmens values.
Measurment is already on limit (so you can't see less than 160uVpp), the next step
is zero (just divide the 2mv/div * 10 div / 256)

How did you achieve it ?

ext ref, enough caps near ADC, better PSU/power distribution/enough caps where they missing/
extrem low noise oscillator/factory calibration with low noise FG (rubidium synched)/replacement of some
passive components by part with less drift.

Can you make a ordered list of what exactly you have done

no, i'm not writing down such things because the improvement was not what i hoped to achieve.
But it is not that hard to DIY, just check the datasheets of components in affected circuit sections
and try to follow manufacurer recommendations.

Do you think it would be too illegible if you start open source hardware project. Actually

such mods can't be declared under open hardware, and btw. since i spend hours to develop LAN ADDON PCB
for hw0, and then canceled production because someone else was about to use my work and produce
them too (say thank to pgup62) i'm not a friend anymore of what so ever open things
- except wide open jung woman's legs.

[tinhead]

maybe someone of you here have a bit of spare time and can try to identify these still unknown components:

SOT23-3, part marking SCJG, pinout 1-VCC, 2-Vout, 3-GND
- this is voltage ref. used in hw1007 instead of LT1790-4.096V

SOT23-5, part marking LJTR, pinout 1-VIN, 2-GND, 3-EN, 4-NC?, 5-VOUT
- this is 2.5V LDO for FPGA PLL - NCP500 possible replacemenr part so solved

SOT23-3, part marking A33B or A3VE, pinout 1-G, 2-D, 3-S
- this is P-MOSFET driving Display backlight - this one not really important,
probably something really cheap, "any" ~1A P-MOS will be good.

[A Hellene]

I am afraid that the closest match I could find for the LJTR is ON Semi's NCP500 (2.5V, 150mA LDO). But the markings for the 2V5 TSOP-5 package should be "LCT" because "LJ" ts the 3V3 QFN flavor of the NCP500... So the the LJTR part is probably not the NCP500.

I had no luck at all with the other three part codes... I guess that the components are fairly new to have be listed online...


-George

[tinhead]

well, maybe clone of NCP500, however pinout match, curret match too - so i take it as possible
replacement part into schematics.

[walt]

... before ppl spend now time desoldering parts

Sorry, I wright our post before read yours.
Yet almost reached the limit in this implementation.

Active probes with a little speed, but higher gain can be a good option for the measurement of signals below the noise level Hantek

[ECL]

maybe someone of you here have a bit of spare time and can try to identify these still unknown components:

SOT23-3, part marking SCJG, pinout 1-VCC, 2-Vout, 3-GND
- this is voltage ref. used in hw1007 instead of LT1790-4.096V

Diodes Inc AP7313-15SR seems to match, in terms of package marking,
but the SR is a reversed pinout (to the more common 1=ground organization).
Output is 1.5V.

Maxim MAX6145EUR-T matches pinout and voltage, no sign of SC marking code

Could match some of the precision shunt lines, like LM4040 etc

These folks suggest SCxx is a Microchip marking prefix (handy site BTW, good job to the team that runs it!):

http://chip.tomsk.ru/chip/chipdoc.nsf/vc1!readform&view=smd&cat=S&start=501&count=500

If so, it might be the MCP1541, which matches voltage output and pinout.

TI REF3040 series may also be a match

ECL  -K

[tinhead]

for those who didn't saw it yet:

https://www.eevblog.com/forum/index.php?topic=4730.0

a nice review of Hantek DSO5xxxB series.

[vlindos]

Hi again
Just wanted to inform you that the CMOS UART port had been removed from the latest hw version.

[vlindos]

And here is a bit more detailed info how to connect to the Linux console and hack the scope:

1. Get CP2102 USB to UART converter (eBay is good place to get one).
2. Connect the cables from the convertor the J801 port correctly - otherwise they say - you will screw up the scope. See the below pictures below how.
3. Start hyper terminal or any equivalent app. Connections settings are:
bandwidth - 115200
data bits - 8
parity - none
stop bits - 1
flow control - none
4. Start the scope. You will get lots of boot up messages. Press Ctrl-C continiusly until you get the :
Press 'Enter' to enter the console.
5. After you enter - follow the original Tinhead instructions:

vi /sys.inf
vi /tmpdst
vi /logotype
vi /logotype.dis (only for fw 2.6.xx and higher)

and replace all DST1102B by DST1202B
In principle if you only do mv xxxxxx xxxxxxx and reboot twice your DSO, everything else will get updated automatically,

[tinhead]

Hi again
Just wanted to inform you that the CMOS UART port had been removed from the latest hw version.

no, it is still there but located on diff. place of the PCB

[vlindos]

Yep, its there. Just though that there two UART ports and the one shown on the first page is missing on mine hw version.

[vlindos]

I had removed the fan "resistor" hack - for the slower speed. I did what tinhead suggested instead - replaced the dedicated LM7812 voltage stabilizer for the fan to L7805. I had also changed the place of the fan and added another one.
PS. Put 2.2 uF (WIMA MKS2) capacitors in addition to the standard capacitors, in the places where tinhead invented the PSU heat removal. Haven't checked for any differences so far. Most probably there wouldn't be any - until I get the cool DC/DC replacement.

[walt]

PS. Put 2.2 uF (WIMA MKS2) capacitors in addition to the standard capacitors,

Standard LOwdrop linear regulator to 3.3 volts requires a certain equivalent series resistance at its output to prevent oscillations. Typically 05-1,5 Omagh. Therefore, it is best to put the output of standard tantalum at 68-100mkF.
After limiting diode into input  of the regulator as a filter, you can put a small tantalum, for example 22mkF * 10Volt

If there is no real ground Y capacitors is better to remove.

PI-Expert recommends for TOPswitch  capacitors with low impedance, but they give nothing in this device.

Replacement of ceramic capacitors on film in the   negative feedback circuits TOPswitch does not add too  nothing, and I returned the original back.
Options absolutely no improvement. As of ferrite bid.


It's all for fun

[tinhead]

for those of you haveing latest hardware revision (hw1007)
there is on every DSO an uniqu file "chk_base_volt", no idea where or how this file will be created in
first place, but without that file hw1007 might not calibrate properly.
The content of such file is like:

[8mv]179
[20mv]370
[400mv]404
[2000mv]2003

especially the 8vm and 20mv values are very unique. Sure in case of loss there is a trick to
be able to re-calibrate without that file (by changing hw revision) but this trick will remove
all benefits of hw1007 (improved accuracy and reduced distortion).

So once again my advice, create a backup of your DSO.

[tinhead]

About Factory Calibration - reloaded

as already posted here

https://www.eevblog.com/forum/index.php?topic=1571.msg50043#msg50043

the factory calibration can be run by everybody who wish to recalibrate for
whatever reason (hw changed, you think something wrong , etc.)

This factory calibration data is of course unique, each DSO have own due hardware tolerance.

There are (by default) following files on the file system:

tdc_edge125M - this is calibration for Edge Trigger by 1GSs (so each ADC in 125MHz)
tdc_overtime125M - this is calibration for Overtime Trigger by 1GSs (so each ADC in 125MHz)
tdc_pulse125M - this is calibration for Pulse Trigger by 1GSs (so each ADC in 125MHz)
mult_adc.log - this is the timing constraint table created from files above (more or less)
tdc.log

additionaly to these default tdc_xxx125M files there is a way to calibrate the long memory,
this will create the following files:

tdc_edge - this is calibration for Edge Trigger by 800GSs (so each ADC in 100MHz)
tdc_overtime - this is calibration for Overtime Trigger by 800GSs (so each ADC in 100MHz)
tdc_pulse - this is calibration for Pulse Trigger by 800GSs (so each ADC in 100MHz)

Don't get confused now, even when the DSO is sampling with max. 400MSs in long memory mode
the calibration itself is running in 800MSs (this is special FPGA/ADC mode).

The calibration procedure itself is the same as here

https://www.eevblog.com/forum/index.php?topic=1571.msg50043#msg50043

exept the fact that you have to select long memory.
It will work in 40k, 512k and 1M settings, however the 512k/1M takes loooong time to process the
data. It is sufficient to run it also in 40k memory depth mode..
I didn't saw any advantage of running calibration for pulse and overtime in 800MSs/long memory mode,
the edge mode was eough to stabilize a bit more the long memory waveforms.


Whate else?

Well, it seems that the calibration in 1GSs mode as described here

https://www.eevblog.com/forum/index.php?topic=1571.msg50043#msg50043

is exactly what the manufacturer is doing (pure visual compare of factory fresh brand new DSO
calibrated vs. exact the same DSO with factory calibration started by me)

However, there seems to be a way to do it a bit better,
when you change sampling type from "real time" to "equ-time" and run then the factory calibration
the resulting set of tdc_xxx125M files will be more accurate. I can clearly see difference on my DSOs.
Not sure if this is working with all firmware versions, but it does on 110531.1 and 110908.0.

In case this is not working on your DSO and the data is not aligned anymore properly
(how this looks like ? well, set e.g. avg 128 and run calibration, you will see immediately
8ns broad jitter band instead of clear waveform edge) just run the calibration
once again with "real time" sampling type selected.

[tinhead]

For those of you who bought Tekway or Hantek in last days and have followed firmware version loaded:

2.06.3 - 110728
2.06.3 - 110801
2.06.3 - 110806
2.06.3 - 110808

All these versions have a ugly bug (in my opinion), the long memory is not available when you
select 8ns/div, 4ns/div and 2ns/div timebase. In principle such capability it could be removed for reason
by both manufacturers, but since the zoom is not working then (select 1M, 20ns/div, do stop and zoom to 8ns
- and waveform disapears) i think this is a bug and not a feature.

As both manufacturers not implemented a downgrade functionality in the firmware update it is a bit hard
(except you do over UART) to downgrade to previously working firmware revision.

To make it easier i compiled a downgrade firmware, it will switch back your DSO to 2.06.3 - 110531.1
(the one with 1M CSV and corrected help.db and proper english menu)

All you have to do is just to run it on your DSO. Note - this version is not manufacturer or model dependant,
it works for all 2.06.x firmwares.

How to use :
- download all 3 files, run the exe to get the dst1kb_9.99.9_cli(111111.0).up (this is due size limitation in forum)
- copy dst1kb_9.99.9_cli(111111.0).up  to EMPTY stick
- do regular firmware update
- reboot DSO
- do "default setup"
- do "self calibration"
- send an email to Hantek or/and Tekway , the email contect could be like "wtf is long memory not working on my DSO?"
no, you don't have to, they know it already and fixed already in latest fw version which is unfortunately not
yet available public, therefore my special downgrade version.

If you have saved any REF waveforms or DSO setups with the affected firmware versions please
overwrite them after the self-calibration. This is necessary because the format of these files might be different.

[vlindos]

Hi, tinhead,
had you though about wifi usb dongle plugin in ?
I think the drivers could be uploaded through the console, we only need to know the kernel vers and architecture. I bet there would be toolchans available.

[tinhead]

had you though about wifi usb dongle plugin in ?
I think the drivers could be uploaded through the console, we only need to know the kernel vers and architecture. I bet there would be toolchans available.

wifi on backside will not work that easy (as you will have to translate host-client and dso specific protocol),
wireless usb from cypress could work (maybe).

wifi on front side is a different story,  some mods in usb plug script mus be done (this is however not the
biggest problem).

The kernel is 2.6.13, toolchains for QQ2440 will be good (arm-linux-gcc-2.95.3) - however this is exactly the biggest
problem - most wifi adapter have drivers working with 2.6.2x  and later kernel.

As i remember RT2870 was a good candidate for even 2.4 kernels.