Some oscilloscope models have 5 ADC of 100MSPS to get 1GSPS, it may be possible to put more HAD1511 in parallel to get a higher sample rate
Virtually all high speed ADCs use interleaving. Internally, the HMCAD1511 also contains 8 ADC cores @125MSa/s, which can be combined in different ways by on-chip multiplexers. For example, in single-channel mode all 8 cores are interleaved (-> 1GSa/s), and in 4-channel mode two cores are interleaved per channel (-> 250Msa/s per channel).
I am not sure if multiple HMCAD1511 can be interleaved easily to get 2GSa/s or more. Likely it's not impossible, but I guess at higher frequencies, all interleaved cores would be better placed on the same chip. While several low-cost 4-channel 1GSa/s scope models from diffferent manufacturers use the HMCAD1511, the 2-GSa/s scopes seem to use different ADCs.
From what I understand about ADC, 10 samples are needed for each Hz, that is, if all 6xx4 use the same ADC HAD1511 of 1GSPS then you can only get 100MHz of bandwidth.
The sample rate is whatever it is, and the bandwidth of the frontent is whatever it is. They are not directly related. The sample rate just sets a limit for the highest frequency content of the
input signal which can be reconstructed from the samples (almost) exactly with sin(x)/x interpolation. See
https://en.wikipedia.org/wiki/Nyquist%E2%80%93Shannon_sampling_theoremIf the bandwidth of the front end is small enough compared to the sampling rate, it may serve as a good enough anti-aliasing filter. OTOH, a frontend with a large bandwidth is rather not supposed to serve as an anti-aliasing filter, and it is up to you to ensure that the input signal is band-limited per se in order not to violate the sampling theorem.