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How good of a DMM or Oscope could you make with modern CPU or GPU ?
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Someone:

--- Quote from: 2N3055 on June 26, 2022, 07:04:58 pm ---
--- Quote from: nctnico on June 26, 2022, 10:58:12 am ---
--- Quote from: Someone on June 26, 2022, 05:51:44 am ---The basic challenge for commodity computer hardware is first bus throughput (how many consumer interfaces carry 4 channels of 10GS/s data? 320Gbit per second) and then what to do with that torrent of data... in short commodity CPUs or GPUs make for really crap scopes compared to task specific ASIC or FPGA designs.
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And yet that is exactly how Lecroy's higher end scopes are built: a relatively dumb sampler and then do all the post processing using CPU + GPU. With ever increasing bandwidths of SOC based systems it is not out of reach to build a low cost scope without doing a lot of processing inside an FPGA. FPGAs take a lot of time to develop and are limited where it comes to resources.

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LeCroy scopes have significant FPGA resources inside.. It deals with triggering engine and decimation and corrections etc etc..
It is measurements and display and decodes that are done on CPU... But they do more processing on CPU than anybody else..
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Keysight and Tektronix also had scopes built around capturing the ADC data to a large FIFO in hardware and then processing on a desktop motherboard/CPU combo, all the same pattern: deep memory, high blind time, tools focusing on analysis.

This has come around before (same handles, same stupid arguments): https://www.eevblog.com/forum/testgear/oscilliscope-memory-type-and-why-so-small/?all
Except that in the 5 years since that thread high end scopes have moved more towards hardware/FPGA/ASIC processing and less on the desktop CPU/GPU. Slow processing is clearly an issue, that "faster" desktop computers aren't solving.
nctnico:
It wouldn't surprise me if that statement turns out to be completely wrong for modern day high-end scopes. There is nothing (FPGA or high-end general purpose processor) that beats a GPU where it comes to number crunching performance per Watt. Or maybe the oscilloscope maker have not discovered this yet but at this point the Xilinx Zync based oscilloscopes are at their performance limits and there is no easy way to add extra performance at a low cost. Improvement has to come from moving to a radically different architecture.
hamster_nz:
For the oscilloscope side, have you had a look at glscopeclient?

https://hackaday.com/2019/05/30/glscopeclient-a-permissively-licensed-remote-oscilloscope-utility/
Someone:

--- Quote from: Someone on June 26, 2022, 09:56:09 pm ---This has come around before (same handles, same stupid arguments): https://www.eevblog.com/forum/testgear/oscilliscope-memory-type-and-why-so-small/?all
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Lol

--- Quote from: nctnico on June 26, 2022, 10:46:06 pm ---It wouldn't surprise me if that statement turns out to be completely wrong for modern day high-end scopes. There is nothing (FPGA or high-end general purpose processor) that beats a GPU where it comes to number crunching performance per Watt.
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Nothing? Its trivial to find comparisons that show GPUs are less energy efficient than FPGAs at numerous (and most) tasks:
"Comparing Energy Efficiency of CPU, GPU and FPGA Implementations for Vision Kernels" 2019,  10.1109/ICESS.2019.8782524
and thats when both are coded in a high level language that has had a focus on GPU processing. There are some tasks where either platform is an obvious leader, and stream data (ADC data correction, trigger, filtering.... scope functions) is where FPGAs are particulalry well suited/efficient.

If you're so smart and GPUs are the answer, why has the scope market moved to FPGAs and ASICs even more than they did in the past?
Fungus:
That's like asking the chips inside an oscilloscope would make a good graphics card .

At the end of the day they both have lots of processing power but they're both specialized for a particular job. It doesn't follow that they'd be good at doing other things.

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