LA vs. signal integrity

[zzattack]

I'm trying to get a proper log of the SD protocol packets exchanged between an SD card and its host interface while it initializes to DDR200 mode.

For this purpose I have 2 seemingly suitable logic analyzers: the 'cheap' $400 DSLogic U3Pro32 and the ZeroPlus LAP-C Pro 16064M (~€1000).

When I hook up the ZeroPlus, the SD card does not initialize properly. If I leave the probe wires connected but remove the connector block from the LA, card initializes fine. Input impedance is listed as 500 kΩ / 10 pF but I must admit I lack the background to understand its implication. The wires are left as short as possible, and I used the shortest probe wires that came with it. This block consists of 8 inputs, 1x GND and 1 clock wire.

Next I tried hooking up the DSLogic and although the wires it came with are over twice as long, the SD card initializes perfectly fine and I can sustain file transfers at >140MB/s while it is connected. It must be noted that these inputs are all accompanied by a GND wire, though I connected only 3 of them. Is that what makes all the difference? Is there something I could do to preven the signal integrity degrading when connected to the zeroplus?


Fwiw, reason I'd very much like to use the ZP software is because of their protocol analyzers. The DSview software that came with the DSLogic is amazing for acquisition, super fast, mega responsive and seemingly stable. The zeroplus software on the other hand feels sluggish, is highly 'themed', occasionally crashes, tends to lose settings, and after acquisition completes it can take a lot of time to transfer the data to the software over USB. The USB3 interface doesn't go much faster than 55MB/s during this. Then the protocol analysis takes another while, during which it is prone to crash. But when all goes well, the result is amazing and analyzing captures with their protocol analyzers works superb. The SD protocol analyzer with DSview on the other hand doesn't process the data lines, doesn't provide a packet list, and makes it incredibly difficult to sort through the data.

[thm_w]

The DSLogic U3Pro32 input impedance is specified as:
- 250KΩ // ~13pF

The LAP-C pro 16064M is listed as:
- 200 kohm, 7 pF, 250 MHz max

Where did you get the 500k figure from?

From what I can tell the LAPC has the resistors built inside the unit whereas dslogic has (some) of them externally in the probe, also the probe wires on the Pro are coax: https://sigrok.org/wiki/DreamSourceLab_DSLogic_Basic
So I assume the LAPC probes are just straight wires?

You can also try the SD analyzer in Sigrok, although it should be similar to DSView.

[lunix]

I suggest this video on YouTube that fully explains what you're seeing.  That explanation starts with theory a little after the 15-minute mark, then proceeds to show comparative O-scope traces from different analyzers, starting after 24 minutes.  My eyes bugged out.  (I had ordered the DSLogic U3Pro32 before watching.  And am glad I did. I haven't received it yet.  My only concern is with the ruggedness of the leads.)

[nctnico]

You need to keep wires to a logic analyser as short as possible as the wire creates a stub on the transmission line which in turn causes reflections. Also the capacitive loading is an issue. The input resistance (I'm avoiding the work impedance here on purpose!) of the logic analyser does not matter that much for high speed signals.  A better solution is to use a connector right on the PCB if you can. Tektronix (and I guess HP/Agilent as well) logic analysers have FET probes which attach directly on a board giving the best possible signal integrity.

[noisyee]

If I remember correct, the probe of the DSLogic have a small series resistor at it's tip. This will improve capacitance loading problem caused by the probe, but at the cost of reduced test system bandwidth.
I have no experience with ZeroPlus, not sure if it have the same series resistor.

[lunix]

The DSLogic uses coaxial probes.  And that is why they don't (much) degrade the signal under-test.  The common ground on most analyzers is also a problem.