EEVblog® Electronics Community Forum
Products => Test Equipment => Topic started by: S. Petrukhin on June 05, 2020, 10:47:03 am
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Hi, friends!
I'm create project on EasyEDA with circuit and PCB: https://easyeda.com/f33net/digital-probe-rigol-mso5000
This is a low cost logic analyzer probe for oscilloscope Rigol MSO5000 with fixded CMOS/TTL logic for 3.3/5.0V input levels with full bandwidth (up to 600MHz if it realy happens during research). It can also be connected to other models with an adapter or using a different cable.
All components are accessible on LCSC. You can order board and all components for about $20 (plus shipping) in a couple of clicks.
Of course, you will not get beautiful wires with tags for half of the price of an oscilloscope cost for (fuck them) $400!
Thanks to guys from EEVblog for pinout of the connector!
Dear friends, good news!
The Probe is assembled and checked, works correctly.
Checked from the built-in generator at 15MHz (generator limit).
[attachimg=1]
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Sorry to be the bringer of bad news but it looks to me like there are issues with your design.
If you look at my pinout (below) for my (proven and tested) MSO5000 Budget Logic Analyzer Probe Set design (https://www.eevblog.com/forum/testgear/ms05000-budget-logic-analyzer-probe-set-design/), you will see that pin 1 is top right as you look into the MSO5000 connector, if your picture of the PCB is top side up i.e. the logic inputs are on the top side of the PCB, then your pin 1 on the 50 pin connector is going to be top left. Even if your PCB is plugged upside down, making your pin 1 bottom right, it's still wrong because your pin 1 is now attached to pin 2 (both happen to be ground) but then your pin 2 of D7+ would be connected to the MSO5000's nProbeDetect pin.
It also looks like you have got other pins wrong on the 50 pin connector; your pin D6- has D7- next to it but it should be D7+.
I would also have at least one 0.1 bypass Cap for each driver IC.
Physically, your 50 pin connector isn't going to fit. There can't be any PCB around it as it fits into a shrouded (surrounded) receptacle so your PCB area under the connector is not going to work and PCB either side of the connector also isn't going to work. This is why I set mine up so that a non-right angle connector puts pins either side of my PCB; my thread includes pictures of this.
You seem not to have any input protection at all for your LVDS driver ICs, the data sheet says the absolute max input voltage is 5V so logic that hits 5.2V may cause problems. I would have fed these inputs via 200 \$\Omega\$ series resistors.
Assuming you fixed the problems with the 50 pin connector, your design will only work at 3.3V and 5V levels.
Also, the 50 pin connector has to be a socket, not a plug. Mine is this one (https://www.digikey.com/product-detail/en/sullins-connector-solutions/SFH11-PBPC-D25-ST-BK/S9201-ND/1990094).
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I like the idea to use a one channels IC ( SN65LVD....) , Then I think, what about Put this IC on the other side of the cable just on the tip, and use 4 wire for each channel ( +Vcc GND D+ D- ), On the mainboard will make only a motherboard to connect the cable of the tips boards with some termination if necessary, I believe will have a much better spec because wee will have a differential transmission line.
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I like the idea to use a one channels IC ( SN65LVD....) , Then I think, what about Put this IC on the other side of the cable just on the tip, and use 4 wire for each channel ( +Vcc GND D+ D- ), On the mainboard will make only a motherboard to connect the cable of the tips boards with some termination if necessary, I believe will have a much better spec because wee will have a differential transmission line.
Other than the one-IC-per-channel, that's the approach some guy called Gandalf_Sr (aka moi) took with his design (https://www.eevblog.com/forum/testgear/ms05000-budget-logic-analyzer-probe-set-design/).
First he used a voltage level translator to allow a range of logic input voltages and then, as close as possible to the point of capture, he changed the signals to LVDS. He then fed the LVDS signals up the ribbon cable as a differential transmission line, and then tried (as far as possible) to make the Connector PCB routing correct for differential pair and impedance purposes.
The 3.3V version has been tested at 200 MHz, the limit of the MSO5000 input.
I know that he still has some spare PCBs if you want a set.
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Sorry to be the bringer of bad news but it looks to me like there are issues with your design.
If you look at my pinout (below) for my (proven and tested) MSO5000 Budget Logic Analyzer Probe Set design (https://www.eevblog.com/forum/testgear/ms05000-budget-logic-analyzer-probe-set-design/), you will see that pin 1 is top right as you look into the MSO5000 connector, if your picture of the PCB is top side up i.e. the logic inputs are on the top side of the PCB, then your pin 1 on the 50 pin connector is going to be top left. Even if your PCB is plugged upside down, making your pin 1 bottom right, it's still wrong because your pin 1 is now attached to pin 2 (both happen to be ground) but then your pin 2 of D7+ would be connected to the MSO5000's nProbeDetect pin.
It also looks like you have got other pins wrong on the 50 pin connector; your pin D6- has D7- next to it but it should be D7+.
I would also have at least one 0.1 bypass Cap for each driver IC.
Physically, your 50 pin connector isn't going to fit. There can't be any PCB around it as it fits into a shrouded (surrounded) receptacle so your PCB area under the connector is not going to work and PCB either side of the connector also isn't going to work. This is why I set mine up so that a non-right angle connector puts pins either side of my PCB; my thread includes pictures of this.
You seem not to have any input protection at all for your LVDS driver ICs, the data sheet says the absolute max input voltage is 5V so logic that hits 5.2V may cause problems. I would have fed these inputs via 200 \$\Omega\$ series resistors.
Assuming you fixed the problems with the 50 pin connector, your design will only work at 3.3V and 5V levels.
Also, the 50 pin connector has to be a socket, not a plug. Mine is this one (https://www.digikey.com/product-detail/en/sullins-connector-solutions/SFH11-PBPC-D25-ST-BK/S9201-ND/1990094).
Hi, Gandalf_Sr!
Sir, thank you very much for your participation and help!
I planned to use a mirror cable:
[attachimg=1].
A regular cable 1:1 is convenient when the devices are standing on each other, but it is very inconvenient when they are opposite - you need to twist the flat cable, and this is very inconvenient. So i changed the pins mirrored.
But you are quite right: i turned over the pins, but i did not turn over the rows. This is a mistake, I will fix it.
But different polarities of lines in the same row - this is news to me. Are you sure that the positive and negative inputs are mixed? I could not check it, i found a pinout here in the forum and there is a negative polarity on all lines on one side, and a positive completely on the other. Maybe this was later discussed and fixed, i grabbed the wrong option? Or is Rigol such that its polarity doesn't matter?
Bypass capacitors for each IC, it seemed unnecessary to me. These chips consume very little current, their noise into power line is very insignificant. Do you think that one capacitor for 4 chips is not enough?
Input protection? Yes, i know that the 5V signal can ringing, but the input of these chips is tolerant to 5V, therefore, it is ready to absorb any ringing. Other excess voltages should not be in the circuit under test. At least in the part where you need to pick up the 5V signal. I generally only work with 3.3V logic. I vote for a direct rail-to-rail connection. But, still, in the new version, I will add 100om resistors - those who do not like them will be able to simply short them. :)
Yes, i designed this device specifically for CMOS/TTL, when you need to take a lot of signals inside the circuit and check, for example, time shifts. For other levels, you can use analog inputs to inspect data on transmission lines. Isn't it?
Thank you again for participating, for a detailed explanation.
I will be very happy if you give your opinion on this message.
And sorry for my English.
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I like the idea to use a one channels IC ( SN65LVD....) , Then I think, what about Put this IC on the other side of the cable just on the tip, and use 4 wire for each channel ( +Vcc GND D+ D- ), On the mainboard will make only a motherboard to connect the cable of the tips boards with some termination if necessary, I believe will have a much better spec because wee will have a differential transmission line.
Hi, ebclr!
Yes, these chips are tiny and can be placed directly in the test clip body, connect each 4 wires. It's convenient, i agree. But then each test clip should get its own GND tail and this is inconvenient. It is not possible to take one GND from the board for all because you will get a loop on the GND. I think it will be bad.
[attachimg=1]
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The mirror cable solves part of my concern. What I can tell you is that the pinout for the MSO5000 connector that I posted above is tested and correct.
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Quote from: Gandalf_Sr on Yesterday at 23:49:38 (https://www.eevblog.com/forum/index.php?topic=243888.msg3089906#msg3089906)The mirror cable solves part of my concern. What I can tell you is that the pinout for the MSO5000 connector that I posted above is tested and correct
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I lost the message where I found pinout. A lot of messages in the topic. You followed and participated in the discussion. How did you find pinot?
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Quote from: Gandalf_Sr on Yesterday at 23:49:38 (https://www.eevblog.com/forum/index.php?topic=243888.msg3089906#msg3089906)The mirror cable solves part of my concern. What I can tell you is that the pinout for the MSO5000 connector that I posted above is tested and correct
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I lost the message where I found pinout. A lot of messages in the topic. You followed and participated in the discussion. How did you find pinot?
I got the pinout from this thread https://www.eevblog.com/forum/testgear/rpl1116-active-logic-probe-pod-for-1000z-series-teardown/ (https://www.eevblog.com/forum/testgear/rpl1116-active-logic-probe-pod-for-1000z-series-teardown/)
There was an early version in that thread that had some of the + & - LVDS pins swapped but I promise you mine above is correct.
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Quote from: Gandalf_Sr on Yesterday at 23:49:38 (https://www.eevblog.com/forum/index.php?topic=243888.msg3089906#msg3089906)The mirror cable solves part of my concern. What I can tell you is that the pinout for the MSO5000 connector that I posted above is tested and correct
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I lost the message where I found pinout. A lot of messages in the topic. You followed and participated in the discussion. How did you find pinot?
I got the pinout from this thread https://www.eevblog.com/forum/testgear/rpl1116-active-logic-probe-pod-for-1000z-series-teardown/ (https://www.eevblog.com/forum/testgear/rpl1116-active-logic-probe-pod-for-1000z-series-teardown/)
There was an early version in that thread that had some of the + & - LVDS pins swapped but I promise you mine above is correct.
Thank you very much, sir!
I get pinout from message number 3 at the beginning of the thread. But I looked at the topic more carefully, saw a photo of the original board, where we can see clearly the different polarity of the pins of some channels. Later in the discussion, people talked about the reverse polarity of some channels on the scope screen. And then the correct pinout appeared. You even asked about it. Well, I lost 10 bucks and will throw out the PCB that is already in delivery or solder the cable without a connector, taking into account the permutations.
Thank you very much!
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Chinese comrades are having a blast... |O
However, I lived in the USSR and understand a little how the system works... 8)
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I strongly recommend to design for the regular cable and not use tricks like mirroring. It will get messy at some point. You can mount the connectors on different sides of the flat cable without changing the order of the pins to achieve the same.
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I strongly recommend to design for the regular cable and not use tricks like mirroring. It will get messy at some point. You can mount the connectors on different sides of the flat cable without changing the order of the pins to achieve the same.
OK, I'll change the angle connector to the regular and make the design for the regular cable.
Using a angle connector with a regular cable is very inconvenient.
Give me a few hours for a new design.
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OK, friends!
The new design is complete.
It is in the same project as version 2.0.
Thank you all for your help and participation.
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I took a look at your schematics. Why are there 100 Ohm resistors between the LVDS signals at the driver side? These shouldn't be there. LVDS is terminated at the receiver. LVDS is a current sourcing/sinking signaling system and adding extra load is reducing the swing at the receiver.
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I took a look at your schematics. Why are there 100 Ohm resistors between the LVDS signals at the driver side? These shouldn't be there. LVDS is terminated at the receiver. LVDS is a current sourcing/sinking signaling system and adding extra load is reducing the swing at the receiver.
I'm not sure exactly about LVDS, but the terminating resistor is placed on both sides of a symmetrical line, isn't it?
Correct me if I'm wrong.
In any case, you can not install these resistors at will.
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Your English is just fine, Don't worry about
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I took a look at your schematics. Why are there 100 Ohm resistors between the LVDS signals at the driver side? These shouldn't be there. LVDS is terminated at the receiver. LVDS is a current sourcing/sinking signaling system and adding extra load is reducing the swing at the receiver.
I asked about this here (https://www.eevblog.com/forum/testgear/rpl1116-active-logic-probe-pod-for-1000z-series-teardown/msg2928736/#msg2928736). The answer was that the guts of the MSO5000 don't appear to have any terminating resistors - I think the internal IC inputs are RSPECL. So you have to terminate the LVDS signals (which are current signals) on a 100 or 120 Ohm resistor to convert them to voltages. Keep reading from my link and you'll see a load of discussion on that page.
In some respects I was designing a circuit with an output into an unknown input although there are some good breakdown photos. Anyway, I have these LVDS terminating resistors on my design and it works with them and it doesn't work without them.
Long story short, I think Sergey is right to include the terminating resistors.
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I took a look at your schematics. Why are there 100 Ohm resistors between the LVDS signals at the driver side? These shouldn't be there. LVDS is terminated at the receiver. LVDS is a current sourcing/sinking signaling system and adding extra load is reducing the swing at the receiver.
I asked about this here (https://www.eevblog.com/forum/testgear/rpl1116-active-logic-probe-pod-for-1000z-series-teardown/msg2928736/#msg2928736). The answer was that the guts of the MSO5000 don't appear to have any terminating resistors - I think the internal IC inputs are RSPECL. So you have to terminate the LVDS signals (which are current signals) on a 100 or 120 Ohm resistor to convert them to voltages. Keep reading from my link and you'll see a load of discussion on that page.
In some respects I was designing a circuit with an output into an unknown input although there are some good breakdown photos. Anyway, I have these LVDS terminating resistors on my design and it works with them and it doesn't work without them.
Long story short, I think Sergey is right to include the terminating resistors.
Yes, I also looked at the photo - there the connector pins are connected to an array of resistors on the visible layer. There may be tracks on the inner layer for terminating resistors, but you can't see the tracks and resistors. And I looked at how it is done on your disign. :)
But why do you say it's a current line? Maybe I not understand the terminology in English, but this is not a line like 4..20 mA, where the signal is transmitted by current. Aren't these resistors the matching ones for the wave resistance?
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...But why do you say it's a current line? Maybe I not understand the terminology in English, but this is not a line like 4..20 mA, where the signal is transmitted by current. Aren't these resistors the matching ones for the wave resistance?
If you look at the first picture at this link on LVDS (https://www.thine.co.jp/en/contents/articles_detail/serdes-lvds.html), you will see that LVDS, at its heart, is a 3.5 mA constant current supply that is switched via an 'H' bridge circuit so it actually, it IS a current system which is why you need the terminating resistor to get you the the Hi and Lo voltage levels that the RSPECL inputs expect.
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...But why do you say it's a current line? Maybe I not understand the terminology in English, but this is not a line like 4..20 mA, where the signal is transmitted by current. Aren't these resistors the matching ones for the wave resistance?
If you look at the first picture at this link on LVDS (https://www.thine.co.jp/en/contents/articles_detail/serdes-lvds.html), you will see that LVDS, at its heart, is a 3.5 mA constant current supply that is switched via an 'H' bridge circuit so it actually, it IS a current system which is why you need the terminating resistor to get you the the Hi and Lo voltage levels that the RSPECL inputs expect.
Understood. Thanks! :-/O
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Anyway, I have these LVDS terminating resistors on my design and it works with them and it doesn't work without them.
Long story short, I think Sergey is right to include the terminating resistors.
Nothing beats the experimental method. :)
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Looking forward to your testing to see if this works as designed. I'd love to order one for myself.
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Looking forward to your testing to see if this works as designed. I'd love to order one for myself.
Unfortunately, delivery is very slow now, I'm still waiting for LVDS drivers. Subscribe to this topic - I will definitely inform here.
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Dear friends, good news!
The Probe is assembled and checked, works correctly.
Checked from the built-in generator at 15MHz (generator limit).
D0-D7 inputs are connectet to first built-in generator at 5MHz.
D8-D15 inputs are connected to second buid-in generator at 15MHz (generator limit).
CH4 input is connected as D8-D15 inputs.
Both generators have settings: Square, MinLevel=0V, MaxLevel=2.5V (generator limit).
Trigger from CH4.
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Show us some pics. :)
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:)
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I recommend replacing R17.
I used 100 Om, but the led was very bright, replace to 5.1 kOm.
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Looks good. The 5.1k LED resistor should allow for 3 or 4 mA of LED current which is good. Looking at the datasheet for the SN65LVDS1, it says that the Absolute Max Vin is Vcc+2 volts so, with Vcc at 3.3V, you should be OK for 3.3 or 5V logic signals.
I see you have tantalum capacitors on the LDO regulator - I'm not a fan of Tantalums because a) they are expensive and b) they can fail explosively! Make sure you pick a voltage rating that is at least twice what you will be operating them at. If you can replace them with MLCC capacitors, I would make that change - more reliable and cheaper. There are some aluminum polymer capacitors that can replace tantalums but they are only available for low voltages.
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Looks good. The 5.1k LED resistor should allow for 3 or 4 mA of LED current which is good. Looking at the datasheet for the SN65LVDS1, it says that the Absolute Max Vin is Vcc+2 volts so, with Vcc at 3.3V, you should be OK for 3.3 or 5V logic signals.
I see you have tantalum capacitors on the LDO regulator - I'm not a fan of Tantalums because a) they are expensive and b) they can fail explosively! Make sure you pick a voltage rating that is at least twice what you will be operating them at. If you can replace them with MLCC capacitors, I would make that change - more reliable and cheaper. There are some aluminum polymer capacitors that can replace tantalums but they are only available for low voltages.
Yes, SN65LVDS1 have tolerant input for 5V. In addition, the logic of 5V TTL never have a logic level" 1 " equal to Vcc, it is always a little less, because this logic is based on bipolar transistors that have a voltage drop at the junction. The ringing of the signal on the fronts is successfully suppressed and dissipated on the input resistors.
I use a lot of tantalum capacitors, ever had a problem. Soviet space and military equipment was saturated with these capacitors. In my opinion, they are good. Here I used only 2 very inexpensive capacitors. I think you needn't be afraid of them. However, the project is open, you can clone it and change the board to any capacitors you like. You can make changes as you wish without restrictions.
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Friends, I found that the output voltage of 4.5V to power the circuit supplied from the oscilloscope was weak and dropped to 4V at load. It seems that the LVDS driver consumes a little, but there are 16 of them and the total current consumption was about 86mA. It turned out that the drivers due to the voltage drop on the LDO does not receive 3.3V, only 3.0V. But the scheme works steadily. 3V is the permissible supply voltage of the LVDS driver.
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The voltage regulator you used, the LM1117 has a dropout voltage (Vin - Vout) of about 1100 mV at 100 mA supply which would explain your not being able to get to 3.3V out.
I used a MC33375ST-3.3T3G (https://www.onsemi.com/pub/Collateral/MC33375-D.PDF) which has a WAY lower dropout voltage, around 115 mV at 100 mA and never more than 500 mV, worst case at full load.
I chose my LDOs because they needed to have very low dropout voltages - sorry I missed that aspect when looking over your design.
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The voltage regulator you used, the LM1117 has a dropout voltage (Vin - Vout) of about 1100 mV at 100 mA supply which would explain your not being able to get to 3.3V out.
I used a MC33375ST-3.3T3G (https://www.onsemi.com/pub/Collateral/MC33375-D.PDF) which has a WAY lower dropout voltage, around 115 mV at 100 mA and never more than 500 mV, worst case at full load.
I chose my LDOs because they needed to have very low dropout voltages - sorry I missed that aspect when looking over your design.
Thank you, sir!
I changed the design to use MC33375ST-3.3T3G in the new version 2.1 now.
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You're welcome.
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You're welcome.
I started making an amplifier for built-in generators. The amplitude of 2.5V is very small, I think to make the gain by 2 or 10.
I sometimes need to emulate the sensor signal in industrial 24V equipment.
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You're welcome.
I started making an amplifier for built-in generators. The amplitude of 2.5V is very small, I think to make the gain by 2 or 10.
I sometimes need to emulate the sensor signal in industrial 24V equipment.
It's already been done for the MSO5000, on the threads here somewhere.
[EDIT] Here it is https://www.eevblog.com/forum/projects/function-generator-booster-for-mso5000/msg2958594/#msg2958594 (https://www.eevblog.com/forum/projects/function-generator-booster-for-mso5000/msg2958594/#msg2958594)
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You're welcome.
I started making an amplifier for built-in generators. The amplitude of 2.5V is very small, I think to make the gain by 2 or 10.
I sometimes need to emulate the sensor signal in industrial 24V equipment.
It's already been done for the MSO5000, on the threads here somewhere.
[EDIT] Here it is https://www.eevblog.com/forum/projects/function-generator-booster-for-mso5000/msg2958594/#msg2958594 (https://www.eevblog.com/forum/projects/function-generator-booster-for-mso5000/msg2958594/#msg2958594)
Unfortunately, I didn't see it. My idea is to make a board/adapter that simultaneously fits into both the sockets of the built-in generator and the USB connector nearby. You can take power from USB for this device.
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I too thought about designing a PCB that plugged into the USB & the 2 BNC connectors but, if you want to use the USB port for more than 1 thing e.g. mouse, USB drive, power for your voltage doubler, your approach will be problematic. I use SMA connectors so I think a better idea is to build a single PCB that has 2 SMA inputs and outputs, plus a 5-12V power input. Then you can use SMA-SMA cables with a SMA-BNC adapter at the scope end and choose where the power comes from, either from the USB (directly or via a small hub, which is what I use), or from a bench power supply.
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I too thought about designing a PCB that plugged into the USB & the 2 BNC connectors but, if you want to use the USB port for more than 1 thing e.g. mouse, USB drive, power for your voltage doubler, your approach will be problematic. I use SMA connectors so I think a better idea is to build a single PCB that has 2 SMA inputs and outputs, plus a 5-12V power input. Then you can use SMA-SMA cables with a SMA-BNC adapter at the scope end and choose where the power comes from, either from the USB (directly or via a small hub, which is what I use), or from a bench power supply.
It is not a problem to make an end-to-end USB channel from the oscilloscope's USB connector to the USB connector on the amplifier's PCB.
Along the way we can take away a bit of power for the amplifier. I don't like free-standing boxes. :)
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It is not a problem to make an end-to-end USB channel from the oscilloscope's USB connector to the USB connector on the amplifier's PCB.
Along the way we can take away a bit of power for the amplifier. I don't like free-standing boxes. :)
Yes, that is a good idea. One question is to make sure that the 5V supply from the USB connection doesn't bring noise into the amplifiers.
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It is not a problem to make an end-to-end USB channel from the oscilloscope's USB connector to the USB connector on the amplifier's PCB.
Along the way we can take away a bit of power for the amplifier. I don't like free-standing boxes. :)
Yes, that is a good idea. One question is to make sure that the 5V supply from the USB connection doesn't bring noise into the amplifiers.
Will need to take care of filtering the power supply for the amplifier.
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Very good work Petrukhin and the ones supporting you :D ;D
What is the next step concerning production ? Do you have a cheap Chinese company looking into doing the production ? :horse: :scared:
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Very good work Petrukhin and the ones supporting you :D ;D
What is the next step concerning production ? Do you have a cheap Chinese company looking into doing the production ? :horse: :scared:
Have not production. This is made for personal use. :-BROKE :-/O
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Hi!
First, thank you very much for this idea!
I need 13.5 V inputs for car diagnostics. So I'm thinking of extend the circuit to arbitrary higher voltages by putting 5V zener diodes in parallel to the inputs and putting 1MOhm resistors in series to this combination of inputs and zener diodes?
Do you see any disadvantages of this?
Best regards
Michael
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Hi!
First, thank you very much for this idea!
I need 13.5 V inputs for car diagnostics. So I'm thinking of extend the circuit to arbitrary higher voltages by putting 5V zener diodes in parallel to the inputs and putting 1MOhm resistors in series to this combination of inputs and zener diodes?
Do you see any disadvantages of this?
Best regards
Michael
Hi, Michael!
I think 1mOm is a lot. This is not a good idea at all. The logical zero voltage in the 13.5V line may be the logical high voltage in the 3.3V line.
And keep in mind that the voltage of the vehicle's on-board network can reach 14.6V.
it is better to use a voltage divider on two resistors.
And even better use a more advanced and inexpensive also probe from sir Gandalf_Sr https://www.eevblog.com/forum/testgear/ms05000-budget-logic-analyzer-probe-set-design/ (https://www.eevblog.com/forum/testgear/ms05000-budget-logic-analyzer-probe-set-design/) This probe can use external threshold voltage.
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Thanks for the plug :D
Sir Gandalf_Sr! I've been knighted and I never knew!
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Friends, did someone use a board of my design? Please write a review if you don't mind.
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Thanks for your work
I have converted it from EasyEDA to KiCad 5.1.7-1 and done a cleanup and rerouting with match length for the signal D0 to 15 (I have done the schematic from scratch too)
The good news is now all is available on KiCad for a version which should work up to 1GSPS (the limit of the MSO5000 LA/TI SN65LVDS1DBVRG4+cables/probes ...).
I have changed some parts also to better parts.
The big plus is I provide also the JLCPCB SMT script to convert the KiCad BOM/POS to JLCPCB SMT BOM & CPL (see JLCPCB_PCBA directory)
(http://[attach=3])
(http://[attach=1])
(http://[attach=2])
The files are available here http://hydrabus.com/Logic_Analyzer_Probe_Rigol_MSO5000_v2_2_BVE_19Oct2020_KiCad.7z (http://hydrabus.com/Logic_Analyzer_Probe_Rigol_MSO5000_v2_2_BVE_19Oct2020_KiCad.7z)
I have bought 2 unit with full assembly(except LDO and connectors which are not available) and 3 spare PCBs of that design and I'm waiting to receive them in few days
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Sorry for my ignorance, but I think it would be sufficient to keep the length of the sum of the individual input and output trace of each comparator equal, which would reduce the amount of wiggles and thus possible EMI and "pulse smearing" considerably.
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Thanks for your work
I have converted it from EasyEDA to KiCad 5.1.7-1 and done a cleanup and rerouting with match length for the signal D0 to 15 (I have done the schematic from scratch too)
The good news is now all is available on KiCad for a version which should work up to 1GSPS (the limit of the MSO5000 LA/TI SN65LVDS1DBVRG4+cables/probes ...).
I have changed some parts also to better parts.
The big plus is I provide also the JLCPCB SMT script to convert the KiCad BOM/POS to JLCPCB SMT BOM & CPL (see JLCPCB_PCBA directory)
(http:// (Attachment Link) )
(http:// (Attachment Link) )
(http:// (Attachment Link) )
The files are available here http://hydrabus.com/Logic_Analyzer_Probe_Rigol_MSO5000_v2_2_BVE_19Oct2020_KiCad.7z (http://hydrabus.com/Logic_Analyzer_Probe_Rigol_MSO5000_v2_2_BVE_19Oct2020_KiCad.7z)
I have bought 2 unit with full assembly(except LDO and connectors which are not available) and 3 spare PCBs of that design and I'm waiting to receive them in few days
You almost completely redesigne the trace, it was a lot of work to put so many wigglings. |O
I also equalized the length of the output LVDS lines in the first version, but after I saw the photo of the scope board, I realized that this would not give privileges. The Chinese comrades did not even install a load resistor on the LVDS receiver side, let alone equalization differential lines.
I'm not much of a high-frequency expert, but it seem like so much wiggling gives parasitic capacitance and inductance. I checked my version at 50 MHz later. The rectangular signal did not give jitter, the image is frozen. But the triangular signal showed a small jitter, probably a slight deviation in the switching level of the LVDS shapers inputs.
It will be good if you create a project with your version on EasyEDA - it will be convenient for other people to make your version for themselves, which is important for high frequencies.
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I do not plan to do the work on EasyEDA as I do not know how it work and because everyone shall switch to a real EDA like KiCad as EasyEDA is clearly not good for advanced PCB and match length / high speed circuits...
For information the match length is here to avoid Clock skew with design v2.1 see https://en.wikipedia.org/wiki/Clock_skew for more details
The rule of thumb for High Speed differential signal (for 480MHz) is each member of a High-Speed differential pair should be no more than 1.25 mm (50 mil) longer than the other member.
If you check original design there was huge gap on match length see my document Signal_Length.ods:
1) Tuning Match Len Diff Signal DX+/- => Minimal trace was 11.18mm and max was 27.38mm so a delta of more than 16.2mm so it clearly violate the rule (>12 times) to do not exceed 1.25mm delta.
2) Tuning Match Len Signal DIX => Minimal trace was 14.16mm and Maximum trace was 75.98mm so a delta of more than 60mm
See reference https://blog.zuken.com/how-to-calculate-trace-length-from-time-delay-value-for-high-speed-signals/
- If you do the computation for a 400MHz it is just 3 times less than the example 1.2GHz so the signal you obtain a clock period of 2500ps with for striplines, the maximum skew should be less than +/-367.5 mil = 9.3345mm and here we have 60mm (>6 times more) ...
- If you do the computation for a 200MHz it is just 6 times less than the example 1.2GHz so the signal you obtain a clock period of 5000ps with for striplines, the maximum skew should be less than +/-735 mil = 18.669mm and here we have 60mm (>3 times more) ...
- If you do the computation for a 100MHz it is just 12 times less than the example 1.2GHz so the signal you obtain a clock period of 10000ps with for striplines, the maximum skew should be less than +/-1470 mil = 37.338mm and here we have 60mm (>1.6 times more) ...
- If you do the computation for a 50MHz it is just 24 times less than the example 1.2GHz so the signal you obtain a clock period of 20000ps with for striplines, the maximum skew should be less than +/-2940 mil = 74.676mm and here we have 60mm so it is ok but not with a big margin ...
An improvement to have less EMI/EMC and better differential routing... will be to use 4 Layers (1_Top, 2_GND, 3_PWR, 4_Bot).
About the questions:
Sorry for my ignorance, but I think it would be sufficient to keep the length of the sum of the individual input and output trace of each comparator equal, which would reduce the amount of wiggles and thus possible EMI and "pulse smearing" considerably.
It is mandatory to do match length on single ended and differential traces separately.
About possible EMI and "pulse smearing" see the paper "Differential Lines Paired with Serpentine as PotentialEMI Aggressors in Mobile Electronic Devices" https://sci-hub.se/https://ieeexplore.ieee.org/document/8114328
We clearly see in this paper EMI/EMC are a potential problem on multi GHz (but not for signal < 500MHz) which is not the case here as we cannot exceed 500MHz anyway with 1GSPS and in fact when you have added all limitations of hardware it will be probably limited to max 200 or 250MHz but the improvements with match length / serpentine + multi via to GND (to reduce EMI/EMC ...) remove the limitation of the original PCB which is limited to less than 100MHz signal and shall allow to capture up to 250MHz(or even up to 500MHz in theory) signal without clock skew issues.[/list]
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For information the match length is here to avoid Clock skew with design v2.1 see https://en.wikipedia.org/wiki/Clock_skew for more details
I have some knowledge in the alignment of the length of the lines. But all efforts are still leveled by the scope itself, where the length of the lines was not thought of. In addition, the bandwidth of the logic analyzer is limited and it does not reach the value you mentioned. I made a simple, very cheap option. This is by no means an accurate or calibration device. Most people don't need to take measurements at high frequencies. I don't have more than 50 MHz anywhere.
You've done some serious research. Your option is worthy of special attention for special cases for cool professionals, but they have a lot of money to buy an expensive scope and logic analyzer. :)
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I'm pretty sure that the LA probe on the MSO5000 series samples at 1 GHz so the absolute maximum frequency that could be sampled is reasonably about 400 MHz. At 400 MHz, the wavelength in copper is around 700 mm. Worrying about less than 2 mm trace length matching is pointless IMHO.
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I'm pretty sure that the LA probe on the MSO5000 series samples at 1 GHz so the absolute maximum frequency that could be sampled is reasonably about 400 MHz. At 400 MHz, the wavelength in copper is around 700 mm. Worrying about less than 2 mm trace length matching is pointless IMHO.
The Rigol MSO5074 specification states that the maximum LA frequency is 200 MHz. :)
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@hydrabus and @Petrukhin
Thank you for your excellent work - very appreciated ^-^
Are we now looking into two deterrent designs and two deferent tests ? or are you working together on this project ?
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The Rigol MSO5074 specification states that the maximum LA frequency is 200 MHz. :)
Yes, they are saying that they don't spec for logic clock frequencies higher than 200 MHz but you need at least double this as the sampling rate; again, I am pretty sure that the MSO5000 samples the LA pins at 1 GHz, that's why there's a 1 nS jitter when you're looking at 200 MHz waveforms.
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@hydrabus and @Petrukhin
Thank you for your excellent work - very appreciated ^-^
Are we now looking into two deterrent designs and two deferent tests ? or are you working together on this project ?
The 2 projects are both LA probe leads that plug into the Rigol MSO5000 series scopes but they are completely different designs.
Mine came first. I have looked at S.Petrukhin's design and offered him my advice and what I believe is constructive criticism. I am not running a business (at least not one selling LA probe PCBs) and I don't feel like I'm in competition here.
[EDIT] I now realize that you were asking about Hydrabus' design vs S.Petrukhin's. I have a completely unrelated design here (https://www.eevblog.com/forum/testgear/ms05000-budget-logic-analyzer-probe-set-design/).
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@hydrabus and @Petrukhin
Thank you for your excellent work - very appreciated ^-^
Are we now looking into two deterrent designs and two deferent tests ? or are you working together on this project ?
I quickly made a simple version myself which is easy to repeat by ordering PCB and accessories in a couple of clicks.. I was really helped by the guys in this forum, who studied and gave information about the standard device. @Gandalf_Sr especially helped-he found errors and suggested them to me. @hydrabus upgraded the board and made an independent version.
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Good evening,
I just bought a rigol mso5000.
I came across this blog.
I went to the Chinese site:
https://easyeda.com/f33net/digital-probe-rigol-mso5000
I saw an opportunity to purchase components.
But I don't see an opportunity to buy the board.
I know it's a simple question but can you help me?
Simogi
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Good evening,
I just bought a rigol mso5000.
I came across this blog.
I went to the Chinese site:
https://easyeda.com/f33net/digital-probe-rigol-mso5000
I saw an opportunity to purchase components.
But I don't see an opportunity to buy the board.
I know it's a simple question but can you help me?
Simogi
Hi!
I answered you on that site: you need to open the PCB in the Editor (see this name button) and select [Fabrication / PCB Fabrication file (PCB)] from the menu there. Then choose when ordering 5 pieces - they will cost $2 plus shipping.
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Thanks so much for the reply.
Now I have succeeded.
I saw in the BOM (components list) that the connectors and flat cable between rigol and board are missing. Do you know them or do you know where I can get a pre-made cable?
Thanks again
Simone G. O.
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Thanks so much for the reply.
Now I have succeeded.
I saw in the BOM (components list) that the connectors and flat cable between rigol and board are missing. Do you know them or do you know where I can get a pre-made cable?
Thanks again
Simone G. O.
Use it for your fun. :)
I had connectors for the wire and the wire itself, I bought them in advance. These are simple items that you can buy at a local store. I didn't search for them on LCSC. Here are the links to Aliexpress that I used to buy:
Pogo pin P100-F1: https://aliexpress.com/item/4001365760976.html (https://aliexpress.com/item/4001365760976.html)
Dupon socet for pins: https://aliexpress.com/item/32717763865.html (https://aliexpress.com/item/32717763865.html)
Single cable 28 AWG 5 meters for pins: https://aliexpress.com/item/4000009001537.html (https://aliexpress.com/item/4000009001537.html)
Test clips: https://aliexpress.com/item/4000550690107.html (https://aliexpress.com/item/4000550690107.html)
Test clips: https://aliexpress.com/item/4000340698351.html (https://aliexpress.com/item/4000340698351.html)
Flat cable 50 wire: https://aliexpress.com/item/32946950330.html (https://aliexpress.com/item/32946950330.html)
Socet for flat cabble 50 pin: https://aliexpress.com/item/4000114961257.html (https://aliexpress.com/item/4000114961257.html)
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I took it all,
Now I have everything to start.
Thanks
Simone G. O.
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Any feedbacks?
As Kicad user, I was planning to pursue the JLCPCB option too. :)
Thanks for your work
I have converted it from EasyEDA to KiCad 5.1.7-1 and done a cleanup and rerouting with match length for the signal D0 to 15 (I have done the schematic from scratch too)
The good news is now all is available on KiCad for a version which should work up to 1GSPS (the limit of the MSO5000 LA/TI SN65LVDS1DBVRG4+cables/probes ...).
I have changed some parts also to better parts.
The big plus is I provide also the JLCPCB SMT script to convert the KiCad BOM/POS to JLCPCB SMT BOM & CPL (see JLCPCB_PCBA directory)
The files are available here http://hydrabus.com/Logic_Analyzer_Probe_Rigol_MSO5000_v2_2_BVE_19Oct2020_KiCad.7z (http://hydrabus.com/Logic_Analyzer_Probe_Rigol_MSO5000_v2_2_BVE_19Oct2020_KiCad.7z)
I have bought 2 unit with full assembly(except LDO and connectors which are not available) and 3 spare PCBs of that design and I'm waiting to receive them in few days
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Any feedbacks?
As Kicad user, I was planning to pursue the JLCPCB option too. :)
I checked design in KiCad and think all fine. Also I got my PCBs with this design.
Now I waiting electronic componets for checking device.
After I get the EC and check device, I will write the results here.
The design is not perfect and can still optimize pcb.
I will check the delay in differential pairs, if i found mistakes then I make my own PCB.
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Any feedbacks?
As Kicad user, I was planning to pursue the JLCPCB option too. :)
I checked design in KiCad and think all fine. Also I got my PCBs with this design.
Now I waiting electronic componets for checking device.
After I get the EC and check device, I will write the results here.
The design is not perfect and can still optimize pcb.
I will check the delay in differential pairs, if i found mistakes then I make my own PCB.
It looks like you used the hydrabus design. As discussed here, and according to the results of my tests, its changes will not interfere with the work, but for the bandwidth of LA MSO5074 they are not it does not matter.
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It looks like you used the hydrabus design. As discussed here, and according to the results of my tests, its changes will not interfere with the work, but for the bandwidth of LA MSO5074 they are not it does not matter.
Yes, I use his design. Perhaps you are right. But I know strict requirements high freq designs like USB bus.
Differential pairs work only if they have the same delay. And they become very easily ineffective if this rule is violated.
A simple example of a USB bus, with bad cable it can work ustable, lose
synchronization, data transfer speed drops.
The correct way is not to align the length of the lines, the correct is to align their delays.
Also for a better high freq design and low noise, you need to have at least a 4-layer PCB.
At high frequencies, we are very dependent on reactive capacitances and inductances.
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It looks like you used the hydrabus design. As discussed here, and according to the results of my tests, its changes will not interfere with the work, but for the bandwidth of LA MSO5074 they are not it does not matter.
Yes, I use his design. Perhaps you are right. But I know strict requirements high freq designs like USB bus.
Differential pairs work only if they have the same delay. And they become very easily ineffective if this rule is violated.
A simple example of a USB bus, with bad cable it can work ustable, lose
synchronization, data transfer speed drops.
The correct way is not to align the length of the lines, the correct is to align their delays.
Also for a better high freq design and low noise, you need to have at least a 4-layer PCB.
At high frequencies, we are very dependent on reactive capacitances and inductances.
This has already been discussed. Rigol engineers did not even bother to install load resistors on the receiver side and did not turn them on inside the FPGA, and you will worry about leveling a couple of centimeters of the track. It's like covering up the gold of the thatched roofs. :)
You create more inductance and capacitance by looping the track. :)
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I checked KiCad logic probe. All works fine.
I gave my pcb to people. I will be making the next version of the probe with a different plug on the output so that I can use high frequency shielded wires from dslogic.
https://www.dreamsourcelab.com/shop/accessories/shielded-fly-wires/ (https://www.dreamsourcelab.com/shop/accessories/shielded-fly-wires/)
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I checked KiCad logic probe. All works fine.
I gave my pcb to people. I will be making the next version of the probe with a different plug on the output so that I can use high frequency shielded wires from dslogic.
https://www.dreamsourcelab.com/shop/accessories/shielded-fly-wires/ (https://www.dreamsourcelab.com/shop/accessories/shielded-fly-wires/)
Shielded doesn't mean high-frequency. :) High-frequency lines must be matched.
And for shielded wires, you can use double female pin, because each input has its own personal Gnd pin in an existing connector.
Get a savings of 23 bucks. :)
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By the way, the LVDS chip is very small. For complex environments where there are requirements for protection against interference, it is possible to embed this chip directly into the tip of the probe and transmit a stable LVDS signal directly from the spot.
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I was on the hunt for nice probes to go with this,
Dream source seems to be a good bet.
https://www.dreamsourcelab.com/shop/accessories/shielded-fly-wires/ (https://www.dreamsourcelab.com/shop/accessories/shielded-fly-wires/)
I'll let you know about the compatibility
There's also these if you want dirt cheap
https://www.aliexpress.com/item/33060152163.html?spm=a2g0o.productlist.0.0.350bd45aRmKXPk&algo_pvid=6ace0999-564b-4c96-a24d-4ea97aea9a24&algo_expid=6ace0999-564b-4c96-a24d-4ea97aea9a24-26&btsid=0bb0624116145943214698372e4b06&ws_ab_test=searchweb0_0,searchweb201602_,searchweb201603_ (https://www.aliexpress.com/item/33060152163.html?spm=a2g0o.productlist.0.0.350bd45aRmKXPk&algo_pvid=6ace0999-564b-4c96-a24d-4ea97aea9a24&algo_expid=6ace0999-564b-4c96-a24d-4ea97aea9a24-26&btsid=0bb0624116145943214698372e4b06&ws_ab_test=searchweb0_0,searchweb201602_,searchweb201603_)
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I was on the hunt for nice probes to go with this,
Dream source seems to be a good bet.
https://www.dreamsourcelab.com/shop/accessories/shielded-fly-wires/ (https://www.dreamsourcelab.com/shop/accessories/shielded-fly-wires/)
I'll let you know about the compatibility
There's also these if you want dirt cheap
https://www.aliexpress.com/item/33060152163.html?spm=a2g0o.productlist.0.0.350bd45aRmKXPk&algo_pvid=6ace0999-564b-4c96-a24d-4ea97aea9a24&algo_expid=6ace0999-564b-4c96-a24d-4ea97aea9a24-26&btsid=0bb0624116145943214698372e4b06&ws_ab_test=searchweb0_0,searchweb201602_,searchweb201603_ (https://www.aliexpress.com/item/33060152163.html?spm=a2g0o.productlist.0.0.350bd45aRmKXPk&algo_pvid=6ace0999-564b-4c96-a24d-4ea97aea9a24&algo_expid=6ace0999-564b-4c96-a24d-4ea97aea9a24-26&btsid=0bb0624116145943214698372e4b06&ws_ab_test=searchweb0_0,searchweb201602_,searchweb201603_)
Here published a list of the materials I used: https://www.eevblog.com/forum/testgear/low-cost-logic-analyzer-probe-for-rigol-mso5000-easyeda-project/msg3344750/#msg3344750 (https://www.eevblog.com/forum/testgear/low-cost-logic-analyzer-probe-for-rigol-mso5000-easyeda-project/msg3344750/#msg3344750)
I made myself tails for the probes from thin silicone wires very soft. The probes you found on Aliexpress use an ordinary PVC wire that is very hard.
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I ordered the PCBS of this they came today. Thank you for this.
Two remarks:
Firstly the groundplane is only on bottom and hatched. There is no technical reason to make it hatched. Better use a solid plane on both sides.
Secondly, and this is way more relevant, the plane is not connected to the probe ground. It is floating. That is not a good idea in my opinion. Better connect it to GND or do not use a plane at all.
This weekend is assembly time and testing.
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This is a two-layer board, there is no free layer for solid fill.
Using a grid in a polygon is just as good for shielding and removing static electricity as a solid fill, but the grid has many times less capacity to the tracks.
However, it is not a shielding layer and it is not connected directly to the Gnd, but neen connext to PE, because its task is to remove static charges, it is connected via the resistor R18 and the capacitor C5.
I chose bad nominals just to avoid creating new positions in BOOM, But this is not essential. It is best to use a 1MOm resistor and a 100pF high-voltage capacitor there.
If you wish, you can close R18 and get a grid rigidly attached to Gnd. :)
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Hi,
This design should work with the 1074z, right? I mean, with a custom 68pin-50pin converter of course.
Thanks,
Andras
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Yes.
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Ok, I built this and it seems to work. The negative edges are omewhat jittery at 5 MHz (with the DG1022 as source). Can't tell why. I tried connecting the plane to gnd with solder jumper and I installed more decoupling capacitors.
Does not have any effect. Could be a display thing, or something with my generator or it could be caused by ringing (my guess). Since I do not have the original probe, I can't say if it behaves differently, better or worse...
Anyway for normal usage it is satisfactory so I wont dig any more into this. Thanks again for the design.
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On the Output of MC33375ST-3.3t3g on schematics show 4v, The correct value isn't 3.3V? Or do you use another regulator?
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On the Output of MC33375ST-3.3t3g on schematics show 4v, The correct value isn't 3.3V? Or do you use another regulator?
4V is the voltage supplied by the scope, and is regulated down to 3.3V.
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Got this built and was able to use it up 160MHz, there was jitter, but I have not worked out whether this could be improved with probing technique. Also I only had a few Dupont cables pieced together to use as probes. I used an FPGA which generated a 160MHZ clock then broke this into 4 bits which would count to 16, (0-F). The parallel decoder was used for this.
See attached screen shot.[attach=1]
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Thanks to all who contributed to the design. :-+
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Hello, why don't you use 4-layer PCB. JLC's 4-layer PCB is only 5 US dollars in size of 50*50mm. Size 100*100mm is only 9 US dollars.
It makes no sense to make 4 layers, fill two of them with a power bus and create parasitic capacities. :)
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I didn't use any stabilization tools for jitter. LVDS chips have a good slope of the output edge, and are quite good at determining the level at the input. But the probe lines introduce their own distortions. At a frequency of 160 MHz, this is already noticeable.
However, the observation by the logic probe of periodic signals in continuous mode (then where the jitter is observed) not really necessary. You can use analog channels for such purposes. I think digital inputs are more reasonable to use in packet capture mode with a sweep trigger in normal mode or a single shot.
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Hi !
Any chance to use this probe with my Rigol MSO1104Z ?
Dominik
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Any chance to use this probe with my Rigol MSO1104Z ?
Yes, but need made inteface cabble for MSO1104Z plug.
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Hallo guys and thank you for that graet stuff here! I have ordered a PCB for a logic probe as described here. Unfortunately the fucking SN65LVDS1DBVRG4 is currently not availlable :horse:. The market is swept empty - worldwide, one year delivery time! Thus I have decided to make a new board on the basis of Sergeis circuit, with the same PCB format. I have called it version 3.0. However I have used the SN65LVDS391D. This seems to be the the same LVDS driver but in a 4 channel housing. With the SIOC16 housing the routing can be structured verry well. All LVDS-lines have almost the same length now. And the best - these parts are availlable for a fair price (Mouser. DigiKey, Farnell...). Please find attached the design documents here. By the way - it is not yet tested! Feel free to use it - but on your own risk.
regards Peter
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A good solution, Peter! :-+
But it seems to me that we should not worry about the length of LVDS lines in real life.
I was checking my version, where the lines have a big difference in length, on the 36 MHz SPI bus.
Didn't detect any interference or jitter. :)
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you are right Sergei - last but not least you have to consider the total lengt of the lines (driver output - ribbon cable - LVDS-input). So small differences on the little bord are negligible. However, the use of the SOIC made it pretty easy to realise this evenly routing.
Peter
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Yes, if we look at the photos of the oscilloscope board (good people published them in this forum), the Chinese guys do not bother with this question at all. :)
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It showed up on ebay.
https://www.ebay.com/itm/224648789536 (https://www.ebay.com/itm/224648789536)
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It showed up on ebay.
https://www.ebay.com/itm/224648789536 (https://www.ebay.com/itm/224648789536)
It's funny to see a modification of my device in the commercial sector on ebay. :popcorn:
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It's funny to see a modification of my device in the commercial sector on ebay. :popcorn:
Yes. And the seller is not from China.
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It's funny to see a modification of my device in the commercial sector on ebay. :popcorn:
Yes. And the seller is not from China.
It is ok. I have not expressed any restrictions for use, including commercial.
The seller has a good rating, good reviews - probably a good person.
In addition, only 5 pcs. - probably, this is the sale of extra copies. :)
If you wish to produce these probes for sale, you can safely do it without any restrictions. :-+
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Hi folks, I'm new here. It's incredible how you guys work together constructively. I was really enjoying reading through this thread ^-^. Unfortunately, the SN65LVDS1DBVRG4 is still not available. Has anyone tried Peter's workaround yet? Did it function correctly?
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Hi folks, I'm new here. It's incredible how you guys work together constructively. I was really enjoying reading through this thread ^-^. Unfortunately, the SN65LVDS1DBVRG4 is still not available. Has anyone tried Peter's workaround yet? Did it function correctly?
LVDS drivers are quite a lot from different manufacturers, both -1-channel and multi-channel. You can get them even from a broken monitor. They are all standard, differ only in bandwidth mainly. Very often they are even completely interchangeable, including by the location of the pins.
I haven't checked thoroughly, do it yourself, but I think that this CHIP can completely replace it - just install it. It is available on LCSC: https://lcsc.com/product-detail/span-style-background-color-ff0-LVDS-span-ICs_Texas-Instruments-DS90LV011AQMFE-NOPB_C130172.html (https://lcsc.com/product-detail/span-style-background-color-ff0-LVDS-span-ICs_Texas-Instruments-DS90LV011AQMFE-NOPB_C130172.html) But this CHIP is intolerant for 5V TTL input, 3.3V only.
I chose the most inexpensive and affordable at that time on LC SC in large quantities. Nevertheless, they work perfectly at a frequency of 36 MHz - I worked at this frequency with the SPI bus and everything was fine.
Unfortunately, the crooks have severely disrupted the semiconductor market.
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Hello,
now it seem very difficult to get all the components (at last, in Europe)
can anyone can help me with supplier or components?
Thanks in advance
Giorgio
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Hello,
now it seem very difficult to get all the components (at last, in Europe)
can anyone can help me with supplier or components?
Thanks in advance
Giorgio
https://lcsc.com/product-detail/span-style-background-color-ff0-LVDS-span-ICs_Texas-Instruments-DS90LV011AQMFE-NOPB_C130172.html
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https://lcsc.com/product-detail/span-style-background-color-ff0-LVDS-span-ICs_Texas-Instruments-DS90LV011AQMFE-NOPB_C130172.html
0 In Stock :'(
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https://lcsc.com/product-detail/span-style-background-color-ff0-LVDS-span-ICs_Texas-Instruments-DS90LV011AQMFE-NOPB_C130172.html
0 In Stock :'(
Unfortunately, the CHIP crisis problem has not been solved. I think it will be even worse, the world is changing a lot.
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yes, I guess I have no option but to buy the 400usd original component. Anyways, thanks a lot for posting and sharing this project. It's super useful! :-+
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Hello Guys,
I have built and tested a few couples of samples of my design 3.0. Everything works fine. Find attached some pictures
[attach=1]
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and here some more..
[attach=1]
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Is there a link for the v3.0 PCB and BoM?
Cheers!
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I just bought the original chip, From China , let wait to arrive
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I just bought the original chip, From China , let wait to arrive
Original CHIP or Rigol probe for $400?
If there is a probe, then you will have beautiful wires. :-DMM
I was offended to buy it for half the price of an oscilloscope, and I also regretted the money.
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I'm talking about the Ti Chip
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Hi,
Can I use it for my ds1104z plus oscilloscope?
I think my oscilloscope and yours using the same device :-BROKE
Thanks
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Hi,
Can I use it for my ds1104z plus oscilloscope?
I think my oscilloscope and yours using the same device :-BROKE
Thanks
Yes, but you need to take care of the connecting wire to the other connector.
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I think both oscilloscope using the same module, so same connection? Right?
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For those who are looking for sn65lvds1dbvr - https://aliexpress.com/wholesale?SearchText=sn65lvds1dbvr
But I already bough 6 x sn65lvds391 |O, so will make my board with it...
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I think both oscilloscope using the same module, so same connection? Right?
And not only oscilloscopes. :) This is a common LVDS interface, widely used.
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I am interested in this kit, does anyone sell it?
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I am interested in this kit, does anyone sell it?
Perconally I can't help you - all logistics from Russia to Europe has been destroyed.
But you can order PCB and assembly on JLCPCB or PCBWay, for example. It's not difficult.
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Hey guys,
I built a version of this DIY LA.
My scope doesn't recognize, when I plug it in.
The outputs of the DS90.. are fine, but the scope indicates a constant low level.
Any advice?
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Hey guys,
I built a version of this DIY LA.
My scope doesn't recognize, when I plug it in.
The outputs of the DS90.. are fine, but the scope indicates a constant low level.
Any advice?
How did you check the LVDS outputs? This is a differential signal, it does not need to be measured relative to gnd, it is the voltage between pins 3 and 4 that is needed. It should change when applying 1 to pin 5.
If this does not happen, the power supply may not be supplied or the chips are faulty.
And it is absolutely necessary to check the flat cable - whether it is properly compressed (it should be 1:1, pin to pin, the keys on both connectors should be in the same position), there is contact on all wires.
Did you remember to turn on LA in the oscilloscope?
This is a very simple circuit, I'm sure you'll find the fault.
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S.P,
just a quick question, how did you generate the board view for this project? i have been using altium to generate PCB files and have not seen a board view quite like that.. very handy for loading a board manually. i searched easyeda's wiki and didn't see anything..
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S.P,
just a quick question, how did you generate the board view for this project? i have been using altium to generate PCB files and have not seen a board view quite like that.. very handy for loading a board manually. i searched easyeda's wiki and didn't see anything..
To get BoardView and a few other very nice features in EasyEDA, you need to install pragins.
Start browsing here: https://easyeda.com/forum/topic/Extension-User-Extensions-for-EasyEDA-Summary-9e065b68316f4491a3911dc6204be31e
Altium is too expensive and cumbersome thing, I don't use it. :)
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Thanks for that.. I have been using Altium for the past 15 years, i have tried to use EasyEDA and KiKad, but i keep trying to use the fast keys for Altium.. i really need to do a full project in either to become more proficient.
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Thanks for that.. I have been using Altium for the past 15 years, i have tried to use EasyEDA and KiKad, but i keep trying to use the fast keys for Altium.. i really need to do a full project in either to become more proficient.
You can import a project from Altium into EasyEDA and generate a BoardView. :scared:
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Hi,
What voltage should be measured on the unloaded ProbeDet pin?
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Hi,
What voltage should be measured on the unloaded ProbeDet pin?
Approximately 3.3-5 volts. :)
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0.4V by me.
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0.4V by me.
0.58V
If short this pin to GND, "Probe connected" message will show about 3 seconds.
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There are no messages on my scope. I can press the LA button, but there is no change in the digit channels. :(
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There are no messages on my scope. I can press the LA button, but there is no change in the digit channels. :(
What is the model of your oscilloscope?
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5074 with patched firmware
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5074 with patched firmware
Are you sure about the correct cable connection?
Pin 1 "Probe detection" is located on the right side in the upper row when looking at the oscilloscope. Connect the two right pins - probe detection.
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I hope so. The other signals are in the right place. (4V, +-2.5V, Refs).
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Hallo everybody!
I got certain inquiries regarding technical documents of the analyzer V3 in the last time. Please find the complete set of design documents here at my website eltguy.de (http://eltguy.de).
have fun!
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Hi Peter and S. Petrukhin,
What size are the resistors, the capacitors and the LED in the V3 design? 0805, 0603?
The Onsemi MC33375ST-3.3T3G in SOT-223-3 package is not in stock. A suggestion for an alternative would be very welcome.
Thanks all for this nice little project, it has a high approval rate of the wallet manager ;D
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Have found the XC6203E332FR-G with Quiescent Current of only 8 µA. I think is needs 3.5V on input minimum
Max Input voltage is 8V, is that enough? I remember something about 4V input.
Different implementation compared to the MC33375ST (no on/off pin for example) this will require PCB change.
Alternative is MCP1755ST-3302E/DB with Quiescent Current of only 68 µA. Needs 3.6V on the input minimum.
Max Input voltage goes up to 16V. Also different implementation compared to the MC33375ST, but less change required.
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Hi Peter and S. Petrukhin,
What size are the resistors, the capacitors and the LED in the V3 design? 0805, 0603?
The Onsemi MC33375ST-3.3T3G in SOT-223-3 package is not in stock. A suggestion for an alternative would be very welcome.
Thanks all for this nice little project, it has a high approval rate of the wallet manager ;D
Hi, Swake!
Version 3.0 was created by Peter_the_diver. I do not know the details.
I think it makes sense for you to take a look at the board and the documentation that Peter kindly published on the site eltguy.de (http://eltguy.de).
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I see now there is more than one page in the PDF.... :palm:
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I have built version 3 with a MCP1754. It works and has enough drop-out and mA. However, the middle pin must be lifted because the MCP1754 has no enable pin. Alternatively cut the trace between pin 1 and 2.
https://ww1.microchip.com/downloads/en/DeviceDoc/20002276C.pdf (https://ww1.microchip.com/downloads/en/DeviceDoc/20002276C.pdf)
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good morning Swake,
as Sergei already mentioned, you find the housings in my documentation. Please take look at the BOM (page2).
Regarding LDO gharec has described a valid option.
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and here some more.
Could you post the design of the box?
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and here some more.
Could you post the design of the box?
It slightly does not match the holes for the connectors, it needs to be modified with a file.
I didn't correct it, I'm sorry. If you can do this, please post the correct version here.
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Спасибо ! Я кстати собрал плату по Вашим чертежам и все отлично работает ! Детали с Алиэкспресс . Единственно обманули с микросхемой 3.3 в ,прислали обычную 78l33 с маркировкой
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Sergey hi! I changed the holes for connectors in the Compass-3D program, I don't have any programs for printing and AutoCAD, so I couldn't save it in the right format.
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I think a faster way to couple digital signals is by a XOR gate used as a inverting buffer and another as non-inverting buffer, followed by a resistor networks that adapts levels
I designed such a resistor network for signals of 3V (3.3V is similar or also the same circuit will work)
Common mode voltage is 1.25V and expected termination 100ohm, for 3.5-4mA (see simulation)
XOR gate can be a fast SN74AUC1G86DCKR (1ns propagation delay)
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I was able to detect 1ns pulses (see red trace) by direct connection to LVDS inputs. So that timing can be reached in a probe board using differential inputs buffered by a faster buffer, like SN65LVDS100 (up to 2gbps)
Note that same IC can be used for a CMOS to LVDS translator, the one without a termination resistor is much like an analog comparator with a bit of hysteresis (capable of 0 to 4V inputs)
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Hi, This looks great - and a much better option that the Rigol probe for my limited needs.
I have the DS1104Z Plus scope with the the 68 pin HPDB LA connector. Has anyone tried this design (or the budget MSO5000 probe https://www.eevblog.com/forum/testgear/ms05000-budget-logic-analyzer-probe-set-design/?all (https://www.eevblog.com/forum/testgear/ms05000-budget-logic-analyzer-probe-set-design/?all)) on this scope ? Maybe there is even a PCB with a HPDB plug instead of the 40pin IDC for the MSO5000 available somewhere ?
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Good afternoon!
Please tell me, did you say to take these drivers SN65LVDS1DBVRG4
https://www.lcsc.com/product-detail/LVDS-ICs_Texas-Instruments-SN65LVDS1DBVRG4_C50990.html (https://www.lcsc.com/product-detail/LVDS-ICs_Texas-Instruments-SN65LVDS1DBVRG4_C50990.html)
But these won't fit by any chance? SN65LVDS1DBVR
https://www.lcsc.com/product-detail/LVDS-ICs_Texas-Instruments-SN65LVDS1DBVR_C465731.html (https://www.lcsc.com/product-detail/LVDS-ICs_Texas-Instruments-SN65LVDS1DBVR_C465731.html)
??
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Hi, This looks great - and a much better option that the Rigol probe for my limited needs.
I have the DS1104Z Plus scope with the the 68 pin HPDB LA connector. Has anyone tried this design (or the budget MSO5000 probe https://www.eevblog.com/forum/testgear/ms05000-budget-logic-analyzer-probe-set-design/?all (https://www.eevblog.com/forum/testgear/ms05000-budget-logic-analyzer-probe-set-design/?all)) on this scope ? Maybe there is even a PCB with a HPDB plug instead of the 40pin IDC for the MSO5000 available somewhere ?
I've designed an improved (and cheaper) version of the board in KiCad for the MSO5000 (and new DHO900) series. I'd also like to do a version for the DS1000Z Plus series with that 68-pin connector, but I don't have that scope to test it with. Would you be interested in trying an alpha-test board Andy? Thanks
https://climbers.net/sbc/clone-pla2216-logic-probe-analyzer/ (https://climbers.net/sbc/clone-pla2216-logic-probe-analyzer/)
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I've designed an improved (and cheaper) version of the board in KiCad for the MSO5000 (and new DHO900) series. I'd also like to do a version for the DS1000Z Plus series with that 68-pin connector, but I don't have that scope to test it with. Would you be interested in trying an alpha-test board Andy? Thanks
https://climbers.net/sbc/clone-pla2216-logic-probe-analyzer/ (https://climbers.net/sbc/clone-pla2216-logic-probe-analyzer/)
I like this option. I would try to order the manufacture of boards for myself.
Only the drivers are not on sale
https://www.lcsc.com/search?q=SN65LVDS391PWR (https://www.lcsc.com/search?q=SN65LVDS391PWR)
https://www.lcsc.com/search?q=SN65LVDS391D (https://www.lcsc.com/search?q=SN65LVDS391D)
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I've designed an improved (and cheaper) version of the board in KiCad for the MSO5000 (and new DHO900) series. I'd also like to do a version for the DS1000Z Plus series with that 68-pin connector, but I don't have that scope to test it with. Would you be interested in trying an alpha-test board Andy? Thanks
https://climbers.net/sbc/clone-pla2216-logic-probe-analyzer/ (https://climbers.net/sbc/clone-pla2216-logic-probe-analyzer/)
I like this option. I would try to order the manufacture of boards for myself.
Only the drivers are not on sale
Note that I'm still working on the design, and the boards haven't been tested yet!
LCSC are temporarily out of stock (I got some last week), but I've just checked and both chips are in stock at Digikey, Mouser and RS for a similar price to LCSC.
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The discussion of the oliver probe option has been moved here: https://www.eevblog.com/forum/testgear/another-low-cost-la-probe-for-rigol-mso5000-by-oliv3r (https://www.eevblog.com/forum/testgear/another-low-cost-la-probe-for-rigol-mso5000-by-oliv3r)
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Super!! Thanks for whoever did it :D
I think we're all happy now.
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Hallo again guys!
As extention to my Logic Probe 3.0 I have designed a 1:3 pre dividor. This enables you to process signal levels of up to 15V with the Logic Probe. If you are interested, please take a look here at my Website https://eltguy.de/selbstbauprojekte-elektronik-technik-hobbytechnologien/logic-probe-ein-digitaler-16-kanal-tastkopf-fuer-oszilloskop/ (https://eltguy.de/selbstbauprojekte-elektronik-technik-hobbytechnologien/logic-probe-ein-digitaler-16-kanal-tastkopf-fuer-oszilloskop/). You can download the relevant design documents there. :D
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When reading all your posts (thank you for them) - just saw that the SN75LVDS driver is for 100 ohms ended.
It seems that, on the MSO5000 side, it's already terminated with 33 ohms resistors - see picture ( from https://www.flickr.com/photos/eevblog/44893167835/in/album-72157701904033821 (https://www.flickr.com/photos/eevblog/44893167835/in/album-72157701904033821) )
Isn't the best option to NOT populate 100 ohms resistors on PCB side? (to avoid worst result than with 33 ohms)
(maybe a newbie mistake, sorry for that)
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When reading all your posts (thank you for them) - just saw that the SN75LVDS driver is for 100 ohms ended.
It seems that, on the MSO5000 side, it's already terminated with 33 ohms resistors - see picture ( from https://www.flickr.com/photos/eevblog/44893167835/in/album-72157701904033821 (https://www.flickr.com/photos/eevblog/44893167835/in/album-72157701904033821) )
Isn't the best option to NOT populate 100 ohms resistors on PCB side? (to avoid worst result than with 33 ohms)
(maybe a newbie mistake, sorry for that)
In the MSO5000, 33 Ohm resistors are installed in series.
I think it's just a protective function and to suppress EMI.
If you remove the 100 Ohm load, the SN75LVDS will be very upset because it tends to maintain current.
The termination resistors should have been inside the MSO5000, but they weren't there. However, the terminator also works well on the other end of the line.
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When reading all your posts (thank you for them) - just saw that the SN75LVDS driver is for 100 ohms ended.
It seems that, on the MSO5000 side, it's already terminated with 33 ohms resistors - see picture ( from https://www.flickr.com/photos/eevblog/44893167835/in/album-72157701904033821 (https://www.flickr.com/photos/eevblog/44893167835/in/album-72157701904033821) )
Isn't the best option to NOT populate 100 ohms resistors on PCB side? (to avoid worst result than with 33 ohms)
(maybe a newbie mistake, sorry for that)
In the MSO5000, 33 Ohm resistors are installed in series.
I think it's just a protective function and to suppress EMI.
If you remove the 100 Ohm load, the SN75LVDS will be very upset because it tends to maintain current.
The termination resistors should have been inside the MSO5000, but they weren't there. However, the terminator also works well on the other end of the line.
As I don't want the LVDS to be upset, I will try to keep them so ;) Sorry to made you verify, and what a strange design on the MSO side :')
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I made 2 variants base on JLCPB capabilities for PCBA (I'm not good for that)
> https://oshwlab.com/gentilkiwi/mso5000_lp
The first one is based on the SN75LVDS387, and the second one on 16x SN65LVDS1
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I made 2 variants base on JLCPB capabilities for PCBA (I'm not good for that)
> https://oshwlab.com/gentilkiwi/mso5000_lp
The first one is based on the SN75LVDS387, and the second one on 16x SN65LVDS1
This design looks better than mine, and I think it's preferable. :)
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Ho, I still not respect tracks lenght... just made it because components available and because I prefer the right angle connector for probes (because of Saelogic connectors compatibility) even if it costs more space on the board !
May also consider XC6206P332MR-G for the LDO, as it's low ESR & it's 'Basic PCBA' :)
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Ho, I still not respect tracks lenght... just made it because components available and because I prefer the right angle connector for probes (because of Saelogic connectors compatibility) even if it costs more space on the board !
May also consider XC6206P332MR-G for the LDO, as it's low ESR & it's 'Basic PCBA' :)
It is correct to align the length of the differential lines, but Rigol engineers did not take care of this, and practice has shown that it still works stably. I used this at a frequency of 84 MHz and observed a small jitter that did not interfere with comfortable operation.
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Hello! Where can I buy DIY kit for logic probe in Russia?
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Hello! Where can I buy DIY kit for logic probe in Russia?
I think most of us order to JLCPCB our boards