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Low cost logic analyzer probe for Rigol MSO5000 EasyEDA project

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S. Petrukhin:
Hi, friends!

I'm create project on EasyEDA with circuit and PCB: https://easyeda.com/f33net/digital-probe-rigol-mso5000

This is a low cost logic analyzer probe for oscilloscope Rigol MSO5000 with fixded CMOS/TTL logic for 3.3/5.0V input levels with full bandwidth (up to 600MHz if it realy happens during research). It can also be connected to other models with an adapter or using a different cable.

All components are accessible on LCSC. You can order board and all components for about $20 (plus shipping) in a couple of clicks.

Of course, you will not get beautiful wires with tags for half of the price of an oscilloscope cost for (fuck them) $400!

Thanks to guys from EEVblog for pinout of the connector!

Dear friends, good news!
The Probe is assembled and checked, works correctly.
Checked from the built-in generator at 15MHz (generator limit).

Gandalf_Sr:
Sorry to be the bringer of bad news but it looks to me like there are issues with your design. 

If you look at my pinout (below) for my (proven and tested) MSO5000 Budget Logic Analyzer Probe Set design, you will see that pin 1 is top right as you look into the MSO5000 connector, if your picture of the PCB is top side up i.e. the logic inputs are on the top side of the PCB, then your pin 1 on the 50 pin connector is going to be top left.  Even if your PCB is plugged upside down, making your pin 1 bottom right, it's still wrong because your pin 1 is now attached to pin 2 (both happen to be ground) but then your pin 2 of D7+ would be connected to the MSO5000's nProbeDetect pin.

It also looks like you have got other pins wrong on the 50 pin connector; your pin D6- has D7- next to it but it should be D7+.

I would also have at least one 0.1 bypass Cap for each driver IC.

Physically, your 50 pin connector isn't going to fit.  There can't be any PCB around it as it fits into a shrouded (surrounded) receptacle so your PCB area under the connector is not going to work and PCB either side of the connector also isn't going to work.  This is why I set mine up so that a non-right angle connector puts pins either side of my PCB; my thread includes pictures of this.

You seem not to have any input protection at all for your LVDS driver ICs, the data sheet says the absolute max input voltage is 5V so logic that hits 5.2V may cause problems.  I would have fed these inputs via 200  \$\Omega\$ series resistors.

Assuming you fixed the problems with the 50 pin connector, your design will only work at 3.3V and 5V levels.

Also, the 50 pin connector has to be a socket, not a plug. Mine is this one.

ebclr:
I like the idea to use a one channels IC ( SN65LVD....)  , Then I think, what about Put this IC  on the other side of the cable just on the tip, and use 4 wire for each channel ( +Vcc GND D+ D- ), On the mainboard will make only a motherboard to connect the cable of the tips boards with some termination if necessary, I believe will have a much better spec because wee will have a differential transmission line.

Gandalf_Sr:

--- Quote from: ebclr on June 05, 2020, 10:45:51 pm ---I like the idea to use a one channels IC ( SN65LVD....)  , Then I think, what about Put this IC  on the other side of the cable just on the tip, and use 4 wire for each channel ( +Vcc GND D+ D- ), On the mainboard will make only a motherboard to connect the cable of the tips boards with some termination if necessary, I believe will have a much better spec because wee will have a differential transmission line.

--- End quote ---
Other than the one-IC-per-channel, that's the approach some guy called Gandalf_Sr (aka moi) took with his design.

First he used a voltage level translator to allow a range of logic input voltages and then, as close as possible to the point of capture, he changed the signals to LVDS.  He then fed the LVDS signals up the ribbon cable as a differential transmission line, and then tried (as far as possible) to make the Connector PCB routing correct for differential pair and impedance purposes.

The 3.3V version has been tested at 200 MHz, the limit of the MSO5000 input.

I know that he still has some spare PCBs if you want a set.

S. Petrukhin:

--- Quote from: Gandalf_Sr on June 05, 2020, 01:25:45 pm ---Sorry to be the bringer of bad news but it looks to me like there are issues with your design. 

If you look at my pinout (below) for my (proven and tested) MSO5000 Budget Logic Analyzer Probe Set design, you will see that pin 1 is top right as you look into the MSO5000 connector, if your picture of the PCB is top side up i.e. the logic inputs are on the top side of the PCB, then your pin 1 on the 50 pin connector is going to be top left.  Even if your PCB is plugged upside down, making your pin 1 bottom right, it's still wrong because your pin 1 is now attached to pin 2 (both happen to be ground) but then your pin 2 of D7+ would be connected to the MSO5000's nProbeDetect pin.

It also looks like you have got other pins wrong on the 50 pin connector; your pin D6- has D7- next to it but it should be D7+.

I would also have at least one 0.1 bypass Cap for each driver IC.

Physically, your 50 pin connector isn't going to fit.  There can't be any PCB around it as it fits into a shrouded (surrounded) receptacle so your PCB area under the connector is not going to work and PCB either side of the connector also isn't going to work.  This is why I set mine up so that a non-right angle connector puts pins either side of my PCB; my thread includes pictures of this.

You seem not to have any input protection at all for your LVDS driver ICs, the data sheet says the absolute max input voltage is 5V so logic that hits 5.2V may cause problems.  I would have fed these inputs via 200  \$\Omega\$ series resistors.

Assuming you fixed the problems with the 50 pin connector, your design will only work at 3.3V and 5V levels.

Also, the 50 pin connector has to be a socket, not a plug. Mine is this one.

--- End quote ---

Hi, Gandalf_Sr!

Sir, thank you very much for your participation and help!

I planned to use a mirror cable:
.
A regular cable 1:1 is convenient when the devices are standing on each other, but it is very inconvenient when they are opposite - you need to twist the flat cable, and this is very inconvenient. So i changed the pins mirrored.

But you are quite right: i turned over the pins, but i did not turn over the rows. This is a mistake, I will fix it.

But different polarities of lines in the same row - this is news to me. Are you sure that the positive and negative inputs are mixed? I could not check it, i found a pinout here in the forum and there is a negative polarity on all lines on one side, and a positive completely on the other. Maybe this was later discussed and fixed, i grabbed the wrong option? Or is Rigol such that its polarity doesn't matter?

Bypass capacitors for each IC, it seemed unnecessary to me. These chips consume very little current, their noise into power line is very insignificant. Do you think that one capacitor for 4 chips is not enough?

Input protection? Yes, i know that the 5V signal can ringing, but the input of these chips is tolerant to 5V, therefore, it is ready to absorb any ringing. Other excess voltages should not be in the circuit under test. At least in the part where you need to pick up the 5V signal. I generally only work with 3.3V logic. I vote for a direct rail-to-rail connection. But, still, in the new version, I will add 100om resistors - those who do not like them will be able to simply short them. :)

Yes, i designed this device specifically for CMOS/TTL, when you need to take a lot of signals inside the circuit and check, for example, time shifts. For other levels, you can use analog inputs to inspect data on transmission lines. Isn't it?

Thank you again for participating, for a detailed explanation.
I will be very happy if you give your opinion on this message.
And sorry for my English.

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