Products > Test Equipment

MS05000 Budget Logic Analyzer Probe Set Design

<< < (10/38) > >>

Gandalf_Sr:

--- Quote from: electricMN on March 23, 2020, 06:39:11 pm ---
--- Quote from: Gandalf_Sr on March 23, 2020, 05:25:31 pm ---I spotted errors in the Probe PCB Digikey saved carts which I've corrected in the previous link, the biggest error is that there were 2 x U5s LDOs.  The LT3060 is expensive but it's one of the few LDOs I could find that went down to 0.6V output.

Some here have asked for the stencil files for the new PCBs so they are attached below.

--- End quote ---

Shouldn't item 6 in the connector board cart be a right angle connector? I believe this is the connector that plugs into the MSO5000 LA port. Or am I mistaken?

--- End quote ---
No the part specified is correct.  It fits like the pictures show, you have to bend the pins towards each other very slightly.

TK:
you can specify a different thickness of the PCB before ordering to match the separation of the pins to avoid bending them and have a tighter fit.

Gandalf_Sr:

--- Quote from: TK on March 24, 2020, 01:16:49 am ---you can specify a different thickness of the PCB before ordering to match the separation of the pins to avoid bending them and have a tighter fit.

--- End quote ---
Thanks but the PCB would have to be 2mm thick, just 0.4 mm more so the pins only need to be bent down 0.2mm per side.  As you can see from the pictures, it's not really even noticeable and has been tested at 50 MHz.  I just used a ruler to bend the pins in ever so slightly.

I suspect that would be doable if I was ordering 1,000s but I wasn't - plus my impedance calculations were based on the standard stackup for a 1.6 mm thick 4-layer PCB.

Gandalf_Sr:
Both boards are in production and show progress :D

Attached is my first cut at the build notes.

Newer V2 build notes are here

Gandalf_Sr:
Status update.

The 4-layer Connector PCBs are showing 12% completion.
The 2-layer Probe PCBs are showing 60% completion, they are at the ENIG stage.

I'm writing a user guide for a running system.

I'm considering a 3D-printable CAD design for a small plastic shield that will clip to the underside of the Probe PCB so they don't short against each other when there are 2 plugged in side by side; I might also do one for the connector PCB.

I've been checking some things too.  The absolute maximum Vcca or Vccb that the 3.3V version (AXC chip) will take is 4.2V and the Vadj should never exceed 3.9 so that looks pretty safe.

Also I've been giving some thought on 3.3V vs 5.0V versions of the Probe PCB; which one should you build?
If you think you will never want to test logic at less than 1.6 volts but want to test 5.0V stuff then you should build the 5.0V version of the Probe PCBs.
If you think you will want to test logic at less than 1.6 volts then you should build the 3.3V version of the Probe PCBs but probably build a 5.0V version too - both can handle 1.6V - 3.3V which is 99% of what I do.
On paper, the 3.3V (AXC) voltage level translator can go up to 200 MHz but the 5.0V (LVC) is limited to 50 MHz (I tested it yesterday and it works fine at 50 MHz).
A small downside of my 5.0V design is that the vn1b3 Probe PCB can't supply more than 3.9V to the board under test so a 5.0V logic board has to feed Vcc into the Vext pin of the logic header - this isn't really that big a deal and the current consumed by this pin is almost zero (a couple of uAs) so it's more a voltage reference than a supply. This could be 'fixed' by adding a small step-up regulator but I think that's taking things too far.

Navigation

[0] Message Index

[#] Next page

[*] Previous page

There was an error while thanking
Thanking...
Go to full version
Powered by SMFPacks Advanced Attachments Uploader Mod