Hi Yusef,
I thought up another test to see if it is possible to load the first bit of the DRAM.
Use sunxi-fel to set the display engine to use the first part of the DRAM:
sudo ./sunxi-fel writel 0x01E60850 0x00000000
sudo ./sunxi-fel writel 0x01E60860 0x00000004
Then load the attached image data to the memory with:
sudo ./sunxi-fel -p write 0x80000000 scope_image.bin.txt
You should see the image building on the screen while it loads.
I also found the reason why the screen flickers when the boot with FEL option is used. The FPGA controls the brightness of the screen with PWM. For this to work the FPGA needs a clock, and that is what is missing. The F1C100s has to initialize the clock synthesizer for this. I'm still looking through the original code to find where this is done.
Another thing I discovered is that the GD32E230 is used to control the power. It generates a hold signal to keep the P-FET active. When the power button is pushed again it is signaled by the GD32E230 and it then releases this hold signal.
Most of the schematic is similar to the 1013D. One difference is that the MCU and FPGA use a separate 3V3 power source. Have done quite a bit already but still need to do the GD32E230 part, which is new since the 1013D just has a touch panel.