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New Rigol DS7000

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DaJMasta:
Specs look promising... but it's really too bad it's only an 8 bit converter.  If they could have gotten to 10 bits or so that really would be high end scope specs.  I guess with so much sampling rate, you can probably get an effective 10 or 11 bits even on a 500MHz signal, but still, if the bandwidth cap is 500MHz, I'd certainly prefer more bits out of the ADCs over higher sample rate.

ch_scr:
It looks to me like the real news is Rigol is announcing its series of ASICs called "Ultravision II" Family. Seems to consist of differential probe, frontend, ADC and clock / processing ASIC. The presentation shows they really don't need a lot of expensive periphery, except the RAM and some nondescript dual core application processor. So a lot more of the customer money gets into their pocket, less of the money gets into the pockets of FPGA, ADC, frontend, clock IC makers. I would say it is big news for Rigol and we will see a whole family of new devices based on this, being released in the expensive to cheap order. I also would say this marks a milestone in the growth of Rigol and shows they really think big and have deep pockets, developing all these ASICs at once. Also note they develop ASICs for what is scope specific (=expensive) and leave out the mass market stuff (RAM, AP).
Edit: typo

nctnico:

--- Quote from: ch_scr on June 05, 2018, 08:25:53 pm ---I would say it is big news for Rigol and we will see a whole family of new devices based on this, being released in the expensive to cheap order.

--- End quote ---
I tend to agree. Which was the last new Rigol scope Dave has showed / tore down? It wouldn't surprise me if it is the DS1054Z from a few years ago.

maginnovision:

--- Quote from: DaJMasta on June 05, 2018, 08:06:26 pm ---Specs look promising... but it's really too bad it's only an 8 bit converter.  If they could have gotten to 10 bits or so that really would be high end scope specs.  I guess with so much sampling rate, you can probably get an effective 10 or 11 bits even on a 500MHz signal, but still, if the bandwidth cap is 500MHz, I'd certainly prefer more bits out of the ADCs over higher sample rate.

--- End quote ---

They couldn't drop the sample rate much since it halves for 2, and 4 channels. So at 4 it's just 2.5gs/s.

DaJMasta:

--- Quote from: maginnovision on June 05, 2018, 09:00:26 pm ---They couldn't drop the sample rate much since it halves for 2, and 4 channels. So at 4 it's just 2.5gs/s.

--- End quote ---

Oof, yeah I see that now.  I suppose it's probably a single asic scope, then?  I assume that means we'll likely see a higher end variant with a pair of asics with a couple years time at the new top end... though at the pricepoint of these, would having two asics in one scope so they could manage 5Gs/s on 4 channels even be competitive with stuff at the 20k+ pricepoint they'd likely be at?  I guess that's all conjecture, but maybe there's a different version of the same core/chip that will come into a new higher end version - I assume there will be cut down derivatives of this on the lower end, in time, too.

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