The v00.01.01.07.01 .GEL file is a .TAR archive and can be opened with the 7-zip decompressor.
Inside there are the following files:
21-06-2018 10:18 81.133.568 app.img
21-06-2018 10:18 4.736 fw4linux.sh
21-06-2018 10:18 4.784 fw4uboot.sh
19-09-2017 07:15 71.920 logo.hex
21-06-2018 10:17 14.210.704 system.img
13-06-2018 14:10 3.510.668 zynq.bit
fw4linux.sh and
fw4uboot.sh are 2 AES-CBC encrypted shell scripts
app.img is a UBI image (file list attached)
logo.hex is a 404x89 bitmap (format 16bpp Rgb565). (image attached)
system.img is a U-Boot FIT Image containing a gzipped 32MBytes filesystem image (rootfs.img).
zynq.bit (FPGA bistream) has the following parsing:
00000000 - FFFFFFFF Padding
00000004 - FFFFFFFF Padding
00000008 - FFFFFFFF Padding
0000000C - FFFFFFFF Padding
00000010 - FFFFFFFF Padding
00000014 - FFFFFFFF Padding
00000018 - FFFFFFFF Padding
0000001C - FFFFFFFF Padding
00000020 - 000000BB Bus width auto detect, word 1
00000024 - 11220044 Bus width auto detect, word 2
00000028 - FFFFFFFF Padding
0000002C - FFFFFFFF Padding
00000030 - AA995566 Sync Word (BPI/SPI Mode)
00000034 - 20000000 T1 - 00000000 NOP (1x)
00000038 - 30022001 00000000 T1 W 00000001 TIMER
00000040 - 30020001 00000000 T1 W 00000001 WBSTAR
00000048 - 30008001 00000000 T1 W 00000001 CMD NULL - No Operation
00000050 - 20000000 T1 - 00000000 NOP (1x)
00000054 - 30008001 00000007 T1 W 00000001 CMD RCRC - Reset CRC
0000005C - 20000000 T1 - 00000000 NOP (2x)
00000064 - 30026001 00000000 T1 W 00000001 FALL_EDGE
0000006C - 30012001 02003FE5 T1 W 00000001 COR0
00000074 - 3001C001 00000000 T1 W 00000001 COR1
0000007C - 30018001 0373B093 T1 W 00000001 IDCODE
00000084 - 30008001 00000009 T1 W 00000001 CMD SWITCH - Switch CCLK Frequency
0000008C - 20000000 T1 - 00000000 NOP (1x)
00000090 - 3000C001 00000401 T1 W 00000001 MASK
00000098 - 3000A001 00000501 T1 W 00000001 CTL0
000000A0 - 3000C001 00000000 T1 W 00000001 MASK
000000A8 - 30030001 00000000 T1 W 00000001 CTL1
000000B0 - 20000000 T1 - 00000000 NOP (8x)
000000D0 - 30002001 00000000 T1 W 00000001 FAR
000000D8 - 30008001 00000001 T1 W 00000001 CMD WCFG - Write Config Data
000000E0 - 20000000 T1 - 00000000 NOP (1x)
000000E4 - 30004000 T1 W 00000000 FDRI
000000E8 - 500D621C T2 W 000D621C
00358964 - 20000000 T1 - 00000000 NOP (2x)
0035896C - 30008001 0000000A T1 W 00000001 CMD GRESTORE - Pulse GRESTORE Signal
00358974 - 20000000 T1 - 00000000 NOP (1x)
00358978 - 30008001 00000003 T1 W 00000001 CMD DGHIGH/LFRM - Last Frame Write
00358980 - 20000000 T1 - 00000000 NOP (100x)
00358B10 - 30008001 00000005 T1 W 00000001 CMD START - Begin Startup Sequence
00358B18 - 20000000 T1 - 00000000 NOP (1x)
00358B1C - 30002001 03BE0000 T1 W 00000001 FAR
00358B24 - 3000C001 00000501 T1 W 00000001 MASK
00358B2C - 3000A001 00000501 T1 W 00000001 CTL0
00358B34 - 30000001 E3AD7EA5 T1 W 00000001 CRC
00358B3C - 20000000 T1 - 00000000 NOP (2x)
00358B44 - 30008001 0000000D T1 W 00000001 CMD DESYNC - Reset DALIGN Signal
00358B4C - 20000000 T1 - 00000000 NOP (400x)
The IDCODE =
0373B093 corresponds to the
Xilinx Zynq-7015 .
Inside the app.img there is another FPGA bitstream (
K160M_TOP.bit ):
00000000 - 0009 (0x0009) File Header Length
00000002 - 0FF00FF0 (0x0FF00FF0) File Header Long 1
00000006 - 0FF00FF0 (0x0FF00FF0) File Header Long 2
0000000A - 00 (0x00) File Header Zero
0000000B - 0001 (0x0001) Key Length
0000000D - 61 002B (key a) Design Name: K160M_TOP;UserID=0XFFFFFFFF;Version=2015.2
0000003B - 62 000D (key b) Part Name: 7k160tffg676
0000004B - 63 000B (key c) Generation Date: 2018/06/12
00000059 - 64 0009 (key d) Generation Time: 22:41:08
00000065 - 65 00661EDC (key e) Bitstream Length: 00661EDC [0000006A-00661F45]
-------------- BITSTREAM ------------------------
0000006A - FFFFFFFF Padding
0000006E - FFFFFFFF Padding
00000072 - FFFFFFFF Padding
00000076 - FFFFFFFF Padding
0000007A - FFFFFFFF Padding
0000007E - FFFFFFFF Padding
00000082 - FFFFFFFF Padding
00000086 - FFFFFFFF Padding
0000008A - 000000BB Bus width auto detect, word 1
0000008E - 11220044 Bus width auto detect, word 2
00000092 - FFFFFFFF Padding
00000096 - FFFFFFFF Padding
0000009A - AA995566 Sync Word (BPI/SPI Mode)
0000009E - 20000000 T1 - 00000000 NOP (1x)
000000A2 - 30022001 00000000 T1 W 00000001 TIMER
000000AA - 30020001 00000000 T1 W 00000001 WBSTAR
000000B2 - 30008001 00000000 T1 W 00000001 CMD NULL - No Operation
000000BA - 20000000 T1 - 00000000 NOP (1x)
000000BE - 30008001 00000007 T1 W 00000001 CMD RCRC - Reset CRC
000000C6 - 20000000 T1 - 00000000 NOP (2x)
000000CE - 30026001 00000000 T1 W 00000001 FALL_EDGE
000000D6 - 30012001 020035E5 T1 W 00000001 COR0
000000DE - 3001C001 00000000 T1 W 00000001 COR1
000000E6 - 30018001 0364C093 T1 W 00000001 IDCODE
000000EE - 30008001 00000009 T1 W 00000001 CMD SWITCH - Switch CCLK Frequency
000000F6 - 20000000 T1 - 00000000 NOP (1x)
000000FA - 3000C001 00000401 T1 W 00000001 MASK
00000102 - 3000A001 00000501 T1 W 00000001 CTL0
0000010A - 3000C001 00000000 T1 W 00000001 MASK
00000112 - 30030001 00000000 T1 W 00000001 CTL1
0000011A - 20000000 T1 - 00000000 NOP (8x)
0000013A - 30002001 00000000 T1 W 00000001 FAR
00000142 - 30008001 00000001 T1 W 00000001 CMD WCFG - Write Config Data
0000014A - 20000000 T1 - 00000000 NOP (1x)
0000014E - 30004000 T1 W 00000000 FDRI
00000152 - 50198570 T2 W 00198570
0066171E - 20000000 T1 - 00000000 NOP (2x)
00661726 - 30008001 0000000A T1 W 00000001 CMD GRESTORE - Pulse GRESTORE Signal
0066172E - 20000000 T1 - 00000000 NOP (1x)
00661732 - 30008001 00000003 T1 W 00000001 CMD DGHIGH/LFRM - Last Frame Write
0066173A - 20000000 T1 - 00000000 NOP (100x)
006618CA - 30008001 00000005 T1 W 00000001 CMD START - Begin Startup Sequence
006618D2 - 20000000 T1 - 00000000 NOP (1x)
006618D6 - 30002001 03BE0000 T1 W 00000001 FAR
006618DE - 3000C001 00000501 T1 W 00000001 MASK
006618E6 - 3000A001 00000501 T1 W 00000001 CTL0
006618EE - 30000001 E3AD7EA5 T1 W 00000001 CRC
006618F6 - 20000000 T1 - 00000000 NOP (2x)
006618FE - 30008001 0000000D T1 W 00000001 CMD DESYNC - Reset DALIGN Signal
00661906 - 20000000 T1 - 00000000 NOP (400x)
It has IDCODE =
0364C093 which corresponds to a
Xilinx XC7K160T FPGA.
flamingo_console is the main app. Inside are the interesting validations.
Rigol DS7000 - License Upgrade Options (as seen on the app code):BW1T2 - BANDWIDTH UPGRADE (100MHZ TO 200MHZ)
BW1T3 - BANDWIDTH UPGRADE (100MHZ TO 350MHZ)
BW1T5 - BANDWIDTH UPGRADE (100MHZ TO 500MHZ)
BW2T3 - BANDWIDTH UPGRADE (200MHZ TO 350MHZ)
BW2T5 - BANDWIDTH UPGRADE (200MHZ TO 500MHZ)
BW3T5 - BANDWIDTH UPGRADE (350MHZ TO 500MHZ)
MSO - ENABLE 16 DIGITAL CHANNELS
2RL - MEMORY DEPTH UPGRADE (250MPTS MAX.)
5RL - MEMORY DEPTH UPGRADE (500MPTS MAX.)
BND - FUNCTION & APPLICATION BUNDLE
COMP - RS232/UART BUS TRIGGER & ANALYSIS
EMBD - I2C/SPI BUS TRIGGER & ANALYSIS
AUTO - CAN/LIN BUS TRIGGER & ANALYSIS
FLEX - FLEXRAY BUS TRIGGER & ANALYSIS
AUDIO - I2S BUS TRIGGER & ANALYSIS
SENSOR - SENT SENSOR TRIGGER & ANALYSIS
AERO - MIL-STD-1553 BUS TRIGGER & ANALYSIS
ARINC - ARINC-429 SERIAL TRIGGER & ANALYSIS
AWG (DG) - DUAL CHANNEL WAVEGEN 25 MHZ
JITTER - JITTER & REALTIME EYE DIAGRAM ANALYSIS
MASK - MASK TEST
PWR - INTEGRATED POWER ANALYSIS
DVM - INTEGRATED DIGITAL VOLTMETER
CTR - INTEGRATED 10 DIGIT COUNTER
EDK - EDUCATION AND TRAINING OPTION
If anyone knows any other descriptions or corrections...