Agilent 16850 vs Tektronix TLA 6400

[dtfi]

Opinions?

http://www.home.agilent.com/en/pc-2309787/16850-series-portable-logic-analyzer-with-25-ghz-timing-in-deep-memory?nid=-32960.0.00&cc=US&lc=eng

vs

http://www.tek.com/logic-analyzer/tla6400

Anybody actually used these bad boys?

This is what Agilent has to say about itself.

http://cp.literature.agilent.com/litweb/pdf/5991-2897EN.pdf

Anybody have experience with these two?

[rfbroadband]

I used the Agilent 1680 (disc continued by now) for many years and it worked fine for me. I can't comment on the Tek. Over the years having a logic analysis capability integrated  with a scope became more important to me, especially since I never needed more than 32 channels. So I sold the 1680A and added a logic analysis module into my scope.

[dtfi]

The problem with the MSOs is that they can't do state analysis, only timing.  They are asynchronous only.  It's really an entirely different animal.  A dedicated logic analyzer can do both asynchronous and synchronous sampling.  The MSOs also generally have very low sample rates.  The TEK 4000 series MSOs for example has 500MS/s rates for the logic analyzer even though the analog channels are into the GS/s.  To get an accurate timing picture of the signal you need about 5-10 samples/pulse.  So this means it can handle about a 50MHz digital signal.  But even then timing will only be accurate to a couple nanoseconds, which isn't very good at all.  Don't get me wrong, I love the MSOs, and have two of them, but they are highly limited when it comes to substantial embedded work.  They are great for low-frequency signals like all the various forms of serial communication, I2C and the like.  If you have an off-the-shelf component that you're trying to interface with another off-the-shelf component through serial, MSOs are great for this type of work.  If your digital circuit is complex enough though to involve things like external memory, graphics processors, A/D or D/A converters, RF modulation, or basically anything that involve precise timing, etc., forget it. 

Even the high-end MSOs, the logic analyzers that come with 6 figure scopes, they can't do state analysis.  It's always just timing analysis and oversampling a signal to recreate the waveform, which means you aren't going to get a precise timing picture relative to the clock.  Depending on how high the sampling rate is, might be good enough, but even a low sampled synchronous analysis will be more horizontally precise than a high sampled asynchronous analysis.  The issue becomes the precise location of the edge of a waveform relative to the clock.  Even picosecond offsets can result in error.  Data needs to arrive at the register and flip it before the next duty cycle starts.   

Now I'm sure they could include state analysis with an MSO, the sampler just needs to trigger off a reference clock essentially, but this would add cost and complexity.  I'm not sure exactly how the state analyzers are designed, but you'll notice they are substantially lower than the max sampling rate of the timing analyzer.  On the Agilent 16850 for instance it has a max sampling rate of 12.5GS/s, with a normal half operation of 5GS/s, whereas the state analyzer is up to 700MHz.  Using the timing analysis you can actually look at signals higher than 700MHz, but their horizontal timing won't be as precise and you won't be able to see errors that occur between duty cycles. 

If a state analyzer were included on an MSO it would be really low frequency probably.  In the case of the Tek 4000 series, it would probably be around 25MHz is max it could handle without substantially effecting cost.  And ultimately they intentionally choose not to because they want those of us doing embedded work to still have to buy a dedicated logic analyzer.  You can spend tens of thousands just on an empty mainframe that doesn't even do anything.  And then tens of thousands more on each module.  It can get a bit crazy.

[nctnico]

You forget one thing: on an MSO you have the analog channels for precise timing. Modern logic analysers have a short high speed memory for that purpuse.
In 99.9% of the cases the timing isn't interesting. Rise/setup times are something you typically debug/verify with an oscilloscope and a very low capacitance probe. Maybe even use a spectrum analyser to check the stability of a clock. In most cases using a logic analyser is just about whether the signals are the way they are supposed to be. State triggering is handy for 0.01% of the cases.