Picotest Injector Teardowns

[Sighound36]

Some good investigational work there chaps.

Personally if going to this detail I would rather over engineer the the whole thing using much better specifications on not just the parts but the board and box. My personal thoughts

[Jay_Diddy_B]

Hi,

Some good investigational work there chaps.

Personally if going to this detail I would rather over engineer the whole thing using much better specifications on not just the parts but the board and box. My personal thoughts

I would be interested to know from users of the PicoTest  injectors which ones are really useful and what improvements are desirable.

I have built and used:

1) Injection transformer for loop measurements - many times

2) PSRR measurement device - Occasionally only with high performance LDOs

3) High Frequency Injector (AC coupled) for looking at capacitor impedance and PDN. (Very Occasionally)

I have never looked at power supply stability by looking at output impedance in the frequency domain. I have done many measurements with a stepped load current. This is really the same thing in the time domain.

Any users out there?

Regards,
Jay_Diddy_B

[Sighound36]

I can see 1 and 2 being very useful for a lot of folks here.

So the J2120A and the J2130A would be my first suggestions

[Wolfgang]

Hi,

Further to my last reply, the manual that can be found here:

https://www.picotest.com/support.html

On page 44 it says the maximum input voltage is DC +  AC is 5V

5V x 74mA = 375mW

This is consistent with the transistor selection and mounting method.

Regards,
Jay_Diddy_B

In my J2111A manual the *output* voltage (and its not the input voltage that counts here) is 40V. So the power is way too much.

[Jay_Diddy_B]

Hi,

Further to my last reply, the manual that can be found here:

https://www.picotest.com/support.html

On page 44 it says the maximum input voltage is DC +  AC is 5V

5V x 74mA = 375mW

This is consistent with the transistor selection and mounting method.

Regards,
Jay_Diddy_B

In my J2111A manual the *output* voltage (and its not the input voltage that counts here) is 40V. So the power is way too much.

Wolfgang,

You are right.
It is not all that clear in the manual and the datasheet which limits apply to which connector
.

By "input" they seem to be referring to the modulation input.

By "output" they are referring to the part that connects to the device under test.

From the teardown photographs of the J2111A 40V transistors are used CZT3904 and CZT3906.

If you apply 40V output and turn on the bias, there will be nearly 1W dissipated in the transistor. If you apply a signal to the modulation input then it increases.

There is no mention of power limit at all.

I am not recommending this architecture, I am exploring its performance and limitations.

Regards,
Jay_Diddy_B

[Wolfgang]

Hi,

Further to my last reply, the manual that can be found here:

https://www.picotest.com/support.html

On page 44 it says the maximum input voltage is DC +  AC is 5V

5V x 74mA = 375mW

This is consistent with the transistor selection and mounting method.

Regards,
Jay_Diddy_B

In my J2111A manual the *output* voltage (and its not the input voltage that counts here) is 40V. So the power is way too much.

Wolfgang,

You are right.
It is not all that clear in the manual and the datasheet which limits apply to which connector
.

By "input" they seem to be referring to the modulation input.

By "output" they are referring to the part that connects to the device under test.

From the teardown photographs of the J2111A 40V transistors are used CZT3904 and CZT3906.

If you apply 40V output and turn on the bias, there will be nearly 1W dissipated in the transistor. If you apply a signal to the modulation input then it increases.

There is no mention of power limit at all.

I am not recommending this architecture, I am exploring its performance and limitations.

Regards,
Jay_Diddy_B

Hi,

they idea to use a fast op-amp and a medium speed transistoris fine and has been discussed in many textbooks.
The technique to serve both polarities (with a dead zone) is something I almost never need (positive would suffice).
This would save you a diode drop in compliance. Speed is fine, but it is only realistic if you have absolutely *no* wiring
between DUT and injector (I used plug shorts). Otherwiese the 40MHz are not reacheable.

https://electronicprojectsforfun.wordpress.com/measuring-a-picotest-j2111a-current-injector/

I mostly work with linear, low noise PSUs so I dont need 40MHz BW. What I would need is a higher voltage/current rating.
I tried D44H11, which is OK up to a few MHz, 60V/120mA, and that worked OK.

Regards
  Wolfgang DL1DWG

[16bitanalogue]

Hi,

Some good investigational work there chaps.

Personally if going to this detail I would rather over engineer the whole thing using much better specifications on not just the parts but the board and box. My personal thoughts

I would be interested to know from users of the PicoTest  injectors which ones are really useful and what improvements are desirable.

Regards,
Jay_Diddy_B

Even though I have access to the injectors, I have not used them myself. I honestly do not need them for the devices I design and support. I have used the Ridley Injection Transformer with the Bode-100 for stability analysis extensively. To help correlate in the time domain, I use a power FET and a AWG to smack the output with a transient load, but it is an open loop design and is very manual to set up.

My colleagues may have their own nitpicks, but two things come to mind:

1. J2120A - by its very nature is passive and was intentional (side conversation with Mr. Sandler). In other words, one would need to use FORCE/SENSE to compensate for any drops over load current. Pictotest also has an application note as well that explains this. I am not sure we can do anything better and maintaining the passive nature of the design.
2. IMO, this exercise is one of cost reduction plus the fun benefit of revealing the circuit and knowing how it works.
3. I also agree with SigHound, let's improve where we can and it looks like the current injectors could benefit from increased power dissipation. I suspect the J2112A is of similar design, just capable of increased power dissipation since it can sink 1A.

I would like to get a hold of their FETSlammer which I suspect is a closed loop design (HS op-amp and a power FET) where the edge rate and V/A is proportional to the fungen output.

[Sighound36]

You could try a BDX33C and use a heat-sink that handles up to 5amps no problem BW is sufficient to.

[Jay_Diddy_B]

Hi group,

been busy with KiCAD and Fusion 360.

Any interest in this project:





This is a blocking capacitor and bias injector.

Regards,
Jay_Diddy_B

[Wolfgang]

Is this a bias Tee ? Where is the decoupling inductor ?

[Jay_Diddy_B]

Hi,
Just a resistor 10k , R1 similar to commercial products.




I could add pads for an inductor to make it more versatile.

Jay_Diddy_B

[Sighound36]

Yes I am interested Jay thank you

[Jay_Diddy_B]

Hi,
an inductor has been added in parallel with the resistor.



The pads have been sized so that a 6mm, 7mm or 10mm inductor will fit.

I have also added four 3.5mm diameter mounting holes.

Any other ideas?

Jay_Diddy_B

[Wolfgang]

... what does your VNA say to this one ?
... how much current does the inductor tolerate before saturating ?

[Jay_Diddy_B]

Hi Wolfgang,

I didn't pick an Inductor I just left space for one.

I think the BNC or SMA connections limit the current.

Do you have any inductors you like for this?

Jay_Diddy_B

[Wolfgang]

Hi Jay,

in fact I made some bias tees for the very low end (10kHz - 200MHz).
The purpose was to support a transistor device parameter extraction with a VNA, and the bias tees were used to
set the operating point. These bias tees are tricky because of the very broad range.

If you want I send you a schematics.

Higher frequency stuff is easy. Mini-Circuits has parts going up to many GHz.

regards
  Wolfgang

[Jay_Diddy_B]

Wolfgang,

I don't think that this is a well designed bias tee for high frequencies.

There will be a 'bump' where are all the capacitors are connected in parallel.

I would do a different design with Coplanar Waveguide for high frequencies.

Please share your schematic (you can PM me if you like).

Jay_Diddy_B

[Sighound36]

Hindsight being a great thing!

Realistically Wolfgang what do you feel is a lower limited that would be useful in with this particularly application?

Or would designing a seperate bias tee as an add on would be more beneifcal?

Thanks

Sighound

[free_electron]

why dont you combine several of these into 1 unit ? or make a 'breakable' circuit board.

[Wolfgang]

@ to all
The art of bias tees is complex because all elements (series Cs, Ls, ...) have parasitics
and what you dont want is a high-Q resonance *anywhere* in your passband.

So the trick is to start with the high frequency end, accept some losses to keep resonances low,
and add section per section with larger Ls and Cs until your low frequency corner is acceptable.

The more sections, the lower the frequency, the larger the inductors get and this increases DC
resistance, something you also dont like.

If the lower limit is in the 100s of Hz, you would combine passive LCRs with active bias Tees (Op amp voltage
regulators where the regulator has a cutoff where you need it.

I will put some info on my website the next few days (schematics, photos, VNA measurements, ...).

regards
  Wolfgang

[sixtimesseven]

Hi group,

been busy with KiCAD and Fusion 360.

Any interest in this project:

(Attachment Link)

(Attachment Link)

This is a blocking capacitor and bias injector.

Regards,
Jay_Diddy_B

Yes, very interesting indeed! Just found this thread. Great work! I made my own PSSR tester since the picotest unit was far to expensive for me. Ended up doing pretty much what Ti suggested:
http://www.ti.com/lit/an/slaa414a/slaa414a.pdf?ts=1590175942099

[Jay_Diddy_B]

Hi,
Let me share a few measurements made on the prototype:



This is a picture of the prototype. It was milled on double sided FR4 PCB. The board is 100mm x 100mm

0 - 200MHz



A DSA815-TG was used for the measurement. The setup was normalized with a BNC barrel connector.

The Bias tee is almost perfectly flat in the frequency range 0 - 200MHz.
This was confirmed using an HP3577A VNA

0 - 1.5GHz

The frequency range was widened to 1.5 GHz



There is a notch at 922MHz

After a little while I realized what was causing this.



I tested a BNC tee piece with an 8cm length of RG316 coax on one limb.

This is the result:



A notch at 625MHz

This notch is when the open length of the line is 1/4 of wavelength.

3 x 10E8 /625 x 10E6  = 48cm

1/4 wavelength = 12cm

velocity factor = 0.66

It kind of works out.


At 922MHz

wavelength = 3 x 10E8 / 922 x10E6 = 32cm

quarter wavelength = 8cm

Open circuit transmission line



The resistor needs to be moved closer to the capacitors.

Regards,
Jay_Diddy_B

[Jay_Diddy_B]

Hi,

The bias line was cut in this location:



And the measurement repeated:



Same vertical scale 5dB/div

Considerable improvement.

Some of the other 'wiggles' will go away if I have more vias between the top and bottom planes.

Regards,
Jay_Diddy_B

[Sighound36]

Hi Jay

As with all things RF, some of the smallest movements generator some of the most obvious gains.

Great work 

[Jay_Diddy_B]

Hi,

I have continued to look at this.

I have been thinking about the best way to connect the large number of capacitor in series / parallel and maintain a controlled impedance.

PCB Design





Prototype board





The board was made from 0.062 FR4 on my LPKF Protomat c60.

Board Assembly





I inserted some of the 'via wires'

Measurement

I used an HP 8714 for the measurement:



This is 3mHz to 3GHz 2dB/div.

looking good!!

Jay_Diddy_B