| Products > Test Equipment |
| Pocket-Sized 6 GHz 1 TS/s ET Scope |
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| SJL-Instruments:
--- Quote from: hpw on February 29, 2024, 08:54:37 am ---In the digital world, any 10..90 or 20..80% rise/fall variations are of any interests. --- End quote --- This is an ideal application for the GigaWave. With the recent improvements to the measurement UI in v2.5.11, you can track the variation of rise/fall times over thousands of sweeps, view all the standard statistics, and export the data for analysis. --- Quote from: hpw on February 29, 2024, 08:54:37 am ---So I would like: - to measure digital 3.3..5V references signals given form OXCO or clock distributions as in the range of 5...100MHz - this means, an internal or external accurate reference is needed. while the DUT PN OXCO is about -120 rtHz @ 1Hz or even lower - this requires a high impedance differential connection/probe to the DUT - also to measure any ripple of the analog/digital power on ADC/DAC as on VRef - a Histogram would tell, all or use any pricey LeCroy gear with Jitter SW IMHO the picture tells all but do not convince me, whether we measure the DUT jitter or internal used TXCO reference jitter. --- End quote --- We would not recommend the GigaWave for measurement of very low phase-noise clock sources, for the reasons you mentioned. The TXCO phase noise above ~1 kHz does not matter, as it's used only to calibrate the delay generator. The jitter of the delay generator is what determines the jitter floor of the scope. This is 4 ps RMS at the trigger and increases with the timebase position. At 100 ns, this is 8 ps RMS. Shahriar was actually quite generous with the jitter comparison, as the shaded region in vector mode plots the RMS, not the peak-to-peak jitter, as digitized by the scope. His 10 ps measurement corresponds to 5 ps RMS (slightly better than spec). |
| SJL-Instruments:
--- Quote from: ddavidebor on February 29, 2024, 11:17:20 am ---Hi SJL-Instruments ! My name is David and I'm responsible for all of the electronics engineering at https://thinksmartbox.com/ We design custom tablet computers for people with disabilities. I would like some help to understand if your device can be used for USB SI testing up to USB 3 Gen 2 (10gbit). I admit I'm not that familiar to problems in the GHz range. Here's a quick summary of the test specs, compiled by R&S https://www.rohde-schwarz.taipei/data/activity/file/1644474550064631375.pdf My questions are: - Are you familiar with the standard? have you ever tried anything like this, or do you have customers that have done it? - Can your device meet the requirements for USB 3 Gen 1 (5gbit) ? - Can your device meet the requirements for USB 3 Gen 2 (10gbit) ? --- End quote --- Thanks for your interest! And quite a noble cause. :) For quantitative characterization of an eye diagram, the scope should have a bandwidth several times the baud rate of the signal. For 5 Gbit/s USB 3, we would recommend a bare minimum of 10 GHz bandwidth. While the GigaWave can show a USB 3 Gen 1 eye diagram, it will not be quantitatively accurate due to its 6 GHz bandwidth. For this reason, we only target up to USB 2.0 High Speed (480 Mbaud). |
| joeqsmith:
I enjoyed watching their review. I almost wish they had given you another week to work on it. Even from the time of the video's release you have made several improvements. It's too bad that the speckles are a focal point. I was talking out loud as he started trying different settings to improve it, crank up the triggers!! :-DD I was going to play with the speckles but my brain hasn't evolved to get past even the basics... --- Quote from: SJL-Instruments on February 26, 2024, 10:28:16 pm ---Yep, these numbers look correct. Units are in probability density per volt. For intensity-grading, the overall scaling is arbitrary and is controlled by the brightness slider. The official software has some auto-ranging for convenience, but it’s not necessary. ... The first point in your result (with a negative dV) should be thrown out. Each final PDF value corresponds to the interval between two neighbouring CDF points. --- End quote --- --- Quote from: joeqsmith on February 27, 2024, 12:20:24 am ---Thanks for double checking my work. ... I will need to think about how best to plot it. .. --- End quote --- For starts I need to sort out how to plot the PDF. I collected raw PAM4 data and attempted to post process it. Any tips on how you converted the PDF back into the voltages you plot? *** Shown is looking at the raw PDF data for the PAM8 signal. While I can see the 8 distinct levels, obviously this is not correct. *** Looking at the PAM4 data (20k triggers, 100 CDF samples, basically the same settings that with your software will produce a decent looking eye. I was surprised how much the PDF varies. On the right side, you can see the sorted PDF values (48,000 total), represented by 366 unique levels ranging from 1264 to 0. Negative PDFs were set to 0. |
| joeqsmith:
Sorting the highest PDF values and then indexing to their corresponding voltage, I get the display on the left (pure guess on my part that is what you are doing). I then look at the PDF distribution (right histogram) and sort for the areas with the highest peaks. I then search for only data that falls within a small percentage of these, which gives me the plot in the center. Does a fair job de-speckling the data but we are also missing some of the good data.... So not a good solution. I tried a few other simple corrections. My take away, it's not a super simple problem. :-DD |
| Lukas:
I was building pretty much this about 12 years ago: https://www.eevblog.com/forum/projects/diy-ghz-sampling-head-for-lt100mhz-scopes/msg971961/#msg971961 but didn't really get around to finish it. (that post is much newer than the project itself). I didn't know how to do FPGAs back then, so there's a bit more discrete ECL logic on my design. Really nice to see that someone took that concept and turned it into a well-polished modern product! I built the ring oscillator out of a meandering trace rather than the adjustable delay line since I thought that it'd have lower jitter. Since there was no FPGA in my design and everything was controlled by an MCU, the triggering rate was much slower. To somewhat compensate for that, I didn't sweep the comparator threshold to build the CDF. Instead I used the comparator to build a SAR ADC that does one bit per trigger event. This approach obviously falls apart when there's significant noise or jitter on the measured signal, but worked well enough for my purposes. |
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