Products > Test Equipment
Possible GW Instek GDS-1000B hack
nctnico:
What if you use the Xilinx devicetree as well? Basically set the oscilloscope up as if it is a Xilinx Zync development board and go from there. Likely a lot of the peripherals will be taken from a development board design so ethernet might just work.
danymogh:
--- Quote from: nctnico on January 12, 2021, 02:32:47 pm ---What if you use the Xilinx devicetree as well? Basically set the oscilloscope up as if it is a Xilinx Zync development board and go from there. Likely a lot of the peripherals will be taken from a development board design so ethernet might just work.
--- End quote ---
that might work but I need a Xilinx Jtag and also I need to know the pinout on the board which I don't. also, I don't have the files of the device tree o just saw them in the bootloader dump. I've started working on the programmer to implement the enable ECC part.
450bush:
--- Quote from: danymogh on January 12, 2021, 03:41:34 pm ---
--- Quote from: nctnico on January 12, 2021, 02:32:47 pm ---What if you use the Xilinx devicetree as well? Basically set the oscilloscope up as if it is a Xilinx Zync development board and go from there. Likely a lot of the peripherals will be taken from a development board design so ethernet might just work.
--- End quote ---
that might work but I need a Xilinx Jtag and also I need to know the pinout on the board which I don't. also, I don't have the files of the device tree o just saw them in the bootloader dump. I've started working on the programmer to implement the enable ECC part.
--- End quote ---
You may try the Pluto SDR github repository for some help... https://github.com/analogdevicesinc/plutosdr-fw . The firmware can be found at the link and it is basec on a Zync processor. The u-boot code/configuration is posted there!
good luck...
danymogh:
I finally got it working !!
here is the correct image for version 1.28 from offset 0x000000000000 to 0x0000033c0000.
which includes the following :
0x000000000000-0x0000001c0000 : "boot"
0x0000001c0000-0x0000001e0000 : "devtree"
0x0000001e0000-0x000000200000 : "env"
0x000000200000-0x000000280000 : "fpga-core"
0x000000280000-0x000000580000 : "kernel"
0x000000580000-0x0000033c0000 : "rootfs"
it should be programmed to the Nand which has no bad blocks in that address range. be careful not to erase the rest of the address space since valuable user data like calibration data and serial number, etc are in there! basically, always have a backup of the /home/dso directory.
also, the last 4 blocks (2 of them) contain the Zynq BBT information in their OOB area which is important for the boot to happen successfully.
nctnico:
Great news! I hope you can make some progress with the Lua scripting.
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