Author Topic: Rigol announces Phoenix chipset and UltraVision II technology platform  (Read 32233 times)

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Offline boggis the cat

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Doesn't look like a touch enabled UI.  That seems to be 'behind the market', now.

(I don't much like the idea of getting greasy fingerprints all over a display that you may be trying to see fine detail on, but I guess that just shows that I am 'behind the market', too.)

The materials look a bit 'cheap'.  Why use a glossy black plastic that shows up any minor defects, when you can make it matt and it will look much better?  Weird decision making.

Hopefully they got the basics right, and have invested in their software engineering.
 

Offline simone.pignatti

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 - Multiple USB ports, hopefully mouse support - which I REALLY like on the RTB2ks

If Rigol dedicated more resources to FW, their higher end market could have some potential.
Yes support for mouse, keyboard etc...
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Offline simone.pignatti

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Doesn't look like a touch enabled UI.  That seems to be 'behind the market', now.

(I don't much like the idea of getting greasy fingerprints all over a display that you may be trying to see fine detail on, but I guess that just shows that I am 'behind the market', too.)

The materials look a bit 'cheap'.  Why use a glossy black plastic that shows up any minor defects, when you can make it matt and it will look much better?  Weird decision making.

Hopefully they got the basics right, and have invested in their software engineering.
the pictures doesn't represent well the real instrument, it looks amazing!
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Offline rf-design

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there are some real pics of Rigol's new platform.

Following the mainboard picture the routing of the 4 AFE signals to one of the ADCs seems inconsistent to me. Typical if there are two ADCs for four channels to to operate the 2CH-20GS/s + 4CH-10GS/s modes the anlog differential signal routing must be different. Only 3 signals are routed to only one of the ADCs.

My guess is that this picture shown in the product presentation is a fake.



Was the product real? Does it have the 20GS/s or is a mockup?
« Last Edit: June 10, 2017, 12:35:37 pm by rf-design »
 

Online Mechatrommer

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there are some real pics of Rigol's new platform.
the 3 USB is really spot on with the new Tek 2GHz :-DD somebody must got a sneak peak during Tek design conference meeting, or is it just coincidence? or 3 USB is some holy number nowadays...

Doesn't look like a touch enabled UI.  That seems to be 'behind the market', now.
(I don't much like the idea of getting greasy fingerprints all over a display that you may be trying to see fine detail on, but I guess that just shows that I am 'behind the market', too.)
that can be, but its not a critical criteria. its 4GHz and 20GSps (Tek is 2GHz 6.5GSps) if that scope is several magnitude cheaper than Tek's "new era" scope, i believe Tek will be a total loser (al;beit its 8ch).
Nature: Evolution and the Illusion of Randomness (Stephen L. Talbott): Its now indisputable that... organisms “expertise” contextualizes its genome, and its nonsense to say that these powers are under the control of the genome being contextualized - Barbara McClintock
 

Offline technogeeky

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My guess is that this picture shown in the product presentation is a fake.
Was the product real? Does it have the 20GS/s or is a mockup?

Well spotted! How bizarre is that!

Unless those units are something like FPGAs or DLPs, then maybe one of them is used for all four channels and the other is used for all other post processing. Or if one is used for four channels and the other is used for RF (in a MDO).

Can anyone imagine any scenario other than this image is a faked/mockup?
 

Offline rf-design

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My guess is that this picture shown in the product presentation is a fake.
Was the product real? Does it have the 20GS/s or is a mockup?

Well spotted! How bizarre is that!

Unless those units are something like FPGAs or DLPs, then maybe one of them is used for all four channels and the other is used for all other post processing. Or if one is used for four channels and the other is used for RF (in a MDO).

Can anyone imagine any scenario other than this image is a faked/mockup?
What possible remain is that the fourth differential analog signal connection from the AFE is strongly folded so that the solder mask is not clearly seen from a flat angle with bad lighting. Furtheron possible the jpg compression of the image reduce the remaining visible serpentines of the folded line. In this case all four channel go into one ADC.
 

Offline nctnico

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My guess is that this picture shown in the product presentation is a fake.
Was the product real? Does it have the 20GS/s or is a mockup?
Well spotted! How bizarre is that!

Unless those units are something like FPGAs or DLPs, then maybe one of them is used for all four channels and the other is used for all other post processing. Or if one is used for four channels and the other is used for RF (in a MDO).

Can anyone imagine any scenario other than this image is a faked/mockup?
Hint: it is very unlikely to be a 1 layer board so where do the other traces go? Given the amount of space needed by the traces going to one ASIC the only explaination is that the other traces run at the other side of the board. Anyway, it is just a picture and I really don't care how a PCB is made if it works.
There are small lies, big lies and then there is what is on the screen of your oscilloscope.
 
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Offline technogeeky

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My guess is that this picture shown in the product presentation is a fake.
Was the product real? Does it have the 20GS/s or is a mockup?
Well spotted! How bizarre is that!

Unless those units are something like FPGAs or DLPs, then maybe one of them is used for all four channels and the other is used for all other post processing. Or if one is used for four channels and the other is used for RF (in a MDO).

Can anyone imagine any scenario other than this image is a faked/mockup?
Hint: it is very unlikely to be a 1 layer board so where do the other traces go? Given the amount of space needed by the traces going to one ASIC the only explaination is that the other traces run at the other side of the board. Anyway, it is just a picture and I really don't care how a PCB is made if it works.

I knew that it's plausible that routing could be done on the other side of the board (except you wouldn't send 3 signals to one ASIC on one side, and then send 1 signal to the other side).

So the plausible explanation is that this is a typical two-ADC configuration except the four channels are routed one side of the board for each.  What would be the signal correspondence for each channel configuration?

1ch: data goes to both ASICs
2ch: one channel per ASIC?
3/4ch: two channels per ASIC?
 

Offline Hydron

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Looks to me like 4 channels going to the rear ADC (last one via a serpentine with poor contrast in the picture), and the front ADC connecting via 4 differential pairs and vias to the other side of the PCB.

Maybe each channel has a switchable input to either ADC, to allow any combination of channels to have higher sampling rate/memory depth when 2 or more channels are unused? Otherwise you end up with limitations on which 2 channels can be used (i.e. (1 OR 2) AND (3 OR 4), not (1 AND 2) OR (3 AND 4)).
 

Offline janekm

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Looks to me like 4 channels going to the rear ADC (last one via a serpentine with poor contrast in the picture), and the front ADC connecting via 4 differential pairs and vias to the other side of the PCB.

Maybe each channel has a switchable input to either ADC, to allow any combination of channels to have higher sampling rate/memory depth when 2 or more channels are unused? Otherwise you end up with limitations on which 2 channels can be used (i.e. (1 OR 2) AND (3 OR 4), not (1 AND 2) OR (3 AND 4)).

Since they so proudly anounced higher front-end integration in their custom AFE ASIC, this makes sense.
 

Offline Bud

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My guess is that this picture shown in the product presentation is a fake.
Was the product real? Does it have the 20GS/s or is a mockup?

Well spotted! How bizarre is that!
...
Can anyone imagine any scenario other than this image is a faked/mockup?

Yes. The scenario is well known, and that is :  rigol has no idea what they do.
Facebook-free life and Rigol-free shack.
 

Offline rdl

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The usual ugly Rigol front panel, just in black this time. Do people still need to be shown that knobs can also be pushed?
 

Offline ebclr

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Elecxtronic load is also beaty
« Reply #63 on: June 11, 2017, 07:28:43 am »
 

Offline rf-design

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Thank you for the better translation.

I have heard about Rigol designing an AFE inhouse about 2010. At this time they ad to hire IC designers. But did not heard about designing a complete 2017-medium class chipset. That is a much bigger surprise than the Tek-5-series. Designing a complete chipset over 10years mean about 10-25milion invest depending on the design group size over time. This will pay off only with a high number of units in the main business of the other 4 group members. Cost wise there is no issue to stuff all scopes with the same chipset because the NRE part of the cost, which could be a double digit factor have to payed already for ADI/TI/Xilinx and need not to send oversee.

Technical interesting is that the Beta Phoenix should solve the long standing problem of a relay less AFE and improve on specs overlooked by others.

"Beta Phonenicis" has up to 4GHz bandwidth, with all needed modules for a digital oscilloscope integrated, plus 1M Ohm digital attenuator in order to achieve true silent acoustic noise free range switching. Thanks to its unique circuit design, its overload recovery in 1M Ohm mode has been reduced to 0.5% of current products.

From the text it is not clear if 0.5% mean that overdrive recovery is

1. 0.5% of the worst competition
2. 0.5% of full scale
3. 0.5% of overdrive

Nothing said about times and condition. I personal do not like the habit of all suppliers that well know imperfections by themselve of instruments have to find out by the user. Instrument selling is a different world than community goods.
 

Offline TurboTom

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@blueskull: Thanks for the translation -- this clarifies some details.

It also explains why Rigol connected all four channels to each of the two digitizing engines. As it seems, each of the digitizers is capable of 10GSa/s. If the new DSO is capable of 20GSa/s and 4GHz, it quickly becomes obvious that these are the figures for single channel operation and also why each input channels needs an analog connection to both digitizing engines.

Moreover, this means that the 4GHz figure is barely feasible for two channel operation and won't be possible in four channel mode (unless they use equivalent time sampling which seems a little obsolete in instruments of this class nowadays). If this is a problem or not for a particular application and if the instrument is a real competitor in the global market at the pricing yet to be disclosed, the customer will finally decide. At least, it's not going to be a mainstream instrument with hunderd thousands of sold units. In this instrument class, probing already becomes a challenege and a lot of speciality knowledge / experience is required to take and interpret measurements properly.

I definitely wish Rigol luck with their new design since a further competitor can only be good for the global T&M instrument market.

Cheers,
Thomas
 

Offline rf-design

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Moreover, this means that the 4GHz figure is barely feasible for two channel operation and won't be possible in four channel mode (unless they use equivalent time sampling which seems a little obsolete in instruments of this class nowadays). If this is a problem or not for a particular application and if the instrument is a real competitor in the global market at the pricing yet to be disclosed, the customer will finally decide. At least, it's not going to be a mainstream instrument with hunderd thousands of sold units. In this instrument class, probing already becomes a challenege and a lot of speciality knowledge / experience is required to take and interpret measurements properly.

Cheers,
Thomas

They could use for a 4CH-20GS/s simply 4 ADCs chips at the production cost which are a fraction of the NRE. No problem to offer this. Aliasing in the case of breaking the useful 5x rule was not an issue in past for marketing and selling a scope.
 

Offline rsjsouza

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This level of investment really brings a lot of excitement to the T&M market. If successful, the chipset proves (once again) how entry level markets can act as enablers of technology. I have seen both examples in the electronics industry, though.
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Oh, the "whys" of the datasheets... The information is there not to be an axiomatic truth, but instead each speck of data must be slowly inhaled while carefully performing a deep search inside oneself to find the true metaphysical sense...
 

Offline pascal_swedenTopic starter

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there are some real pics of Rigol's new platform.





Nice pictures! Did you attend the conference?
Were there any handouts?

The new design again confirms that Rigol has better designers in house than GW-Instek :)
 

Offline thm_w

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Do people still need to be shown that knobs can also be pushed?
I like the design, but I agree with the button thing. R&S and keysight do this as well.
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Offline EEVblog

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More



So 1G memory, 20GS/s, 600Kwfps, 4GHz bandwidth, 1M FFT, touch, and most importantly , "fashionable"!
« Last Edit: June 13, 2017, 07:41:24 am by EEVblog »
 

Offline pascal_swedenTopic starter

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What is the source of these additional pictures Dave? Trump and the Russians? :)
 

Online JPortici

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"Fashionable"
 

Offline EEVblog

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What is the source of these additional pictures Dave? Trump and the Russians? :)

A Ukrainian guy in a trench coat in a dark alley at midnight.
 
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Offline nctnico

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"Fashionable"
They wrote that especially for pascal_sweden since he tends to care about that sort of things in test equipment  >:D
There are small lies, big lies and then there is what is on the screen of your oscilloscope.
 
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