FNIRSI DLA-16 Plus / DLA-32 Plus Logic Analyzer

[TomKatt]

Also - what is meant by 'Max Collectable Frequency - 200MHz' ?   Is this the bandwidth limit for signals to be sampled ?   And from my minimal experience with high frequency measurements, I'm guessing that by the time you reach 200 MHz the probes are a bigger limitation than anything else...

I'm likewise unsure what is meant by 'Max Sampling Rate (Buffer Stream) - 4Gbit At low sampling rates, depends on the computer's memory size'...  I think they are conflating storage depth with sampling rate?

[smk]

are there any advanced trigger options?

The Windows software from FNIRSI has a tab for sophisticated triggers, but it is disabled. I haven't delved into this topic yet. In the moment the standard capabilities of Sigrok are more than enough for me.

According to the product description only the DLA-32 Plus has advanced triggering, the DLA-16 PLUS only has versatile triggering:

Versatile Triggering: DLA-16 Plus and DLA-32 Plus support rising-edge, falling-edge, high-level, low-level, and any-edge triggering for accurate digital signal capture.
Advanced Triggering on DLA-32 Plus: Supports serial and parallel triggering, with up to 16 configurable parallel trigger levels and flexible serial matching conditions.

[megabyte]

According to the product description only the DLA-32 Plus has advanced triggering, the DLA-16 PLUS only has versatile triggering:

Thank you. Good catch. I haven't seen this information.

[megabyte]

Also - what is meant by 'Max Collectable Frequency - 200MHz' ?   Is this the bandwidth limit for signals to be sampled ?

I interpreted it as the bandwidth.

I'm likewise unsure what is meant by 'Max Sampling Rate (Buffer Stream) - 4Gbit At low sampling rates, depends on the computer's memory size'...  I think they are conflating storage depth with sampling rate?

I am not a native speaker and I have absolutely no idea what they mean by this sentence.

[TomKatt]

According to the product description only the DLA-32 Plus has advanced triggering, the DLA-16 PLUS only has versatile triggering:

Versatile Triggering: DLA-16 Plus and DLA-32 Plus support rising-edge, falling-edge, high-level, low-level, and any-edge triggering for accurate digital signal capture.
Advanced Triggering on DLA-32 Plus: Supports serial and parallel triggering, with up to 16 configurable parallel trigger levels and flexible serial matching conditions.

That's a pretty big feature set discrepancy!  The ability to trigger on specific patterns or similar serial data can be the difference between identifying a problem quickly and luck of the draw.  Do they use different FPGA controllers or would this be a software constraint?

My DSLogic Plus has advanced triggering that has proven useful on multiple occasions.

[abeyer]

I'm likewise unsure what is meant by 'Max Sampling Rate (Buffer Stream) - 4Gbit At low sampling rates, depends on the computer's memory size'...  I think they are conflating storage depth with sampling rate?

Haven't looked closely at this one, but most of these USB logic analyzers support two modes of capture: a buffered mode where they store to onboard RAM as fast as they're capable of, and a streaming mode where they don't store in hardware at all and just stream the samples back to the PC over USB at a slower speed.

So I think that's meant to say that it has 4Gb internal sample memory that can operate at full speed or can sample at slower speeds over USB up to the RAM available on the PC.

[TomKatt]

So I think that's meant to say that it has 4Gb internal sample memory that can operate at full speed or can sample at slower speeds over USB up to the RAM available on the PC.

That's what I was thinking - but that should have been already addressed in their speed/streaming spec:

Max Sampling Rate (Stream)   [DLA16]1CH/1G, 2CH/1G, 4CH/500M, 8CH/250M, 16CH/125M   [DLA32]1CH/1G, 2CH/1G, 4CH/500M, 8CH/250M, 16CH/125M, 32CH/50M

That should be related to a USB 3 connection.

My DSLogic Plus USB 2.0 specs streaming speed as
—   3 channels: 100MHz
—   6 channels: 50MHz
—   12 channels: 25MHz
—   16 channels: 20MHz

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That should be related to a USB 3 connection.

Correct.

USB 3.0 supports up to 5 Gbit/s. I attempted to capture data using 4 channels on 1 Gbit/s in streaming mode using the Sigrok driver. Unfortunately, it didn't - a lot of errors appeared in the data. I suspect this is limitation of LA's hardware rather than USB 3.0 throughput.

[TomKatt]

USB 3.0 supports up to 5 Gbit/s. I attempted to capture data using 4 channels on 1 Gbit/s in streaming mode using the Sigrok driver. Unfortunately, it didn't - a lot of errors appeared in the data. I suspect this is limitation of LA's hardware rather than USB 3.0 throughput.

That must be where the 'Max Sampling Rate (Buffer Stream) - 4Gbit At low sampling rates, depends on the computer's memory size' text comes into play...  You might get it, you might not 

[megabyte]

I made a naive attempt to swap the internal DLA-16 and DLA-32 identifiers within the Windows program's binary file. Upon launch, my DLA-16 was recognized as a DLA-32, and the advanced trigger settings panel became available. Unfortunately, the advanced trigger functionality on the DLA-16 does not work. It appears to be a hardware limitation (a resistor on the PCB or settings in the flash memory?).

[voltsandjolts]

The PCB has U38 128Mbit FLASH which is likely holding the fpga bitstream which is loaded to the fpga at power-on.
That bitstream could be specific to the PCB (16 or 32 channels, and trigger features).

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I connected to the serial port of the LA. There is nothing interesting there. There are only two strings and no reaction on typing or during signals acquisition.

BootLoader Init...
Jump To User Code!

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And the manual says you can use negative thresholds down to -5V. Is that really true?

Yes, it is true. See the attached screenshots.

The FNIRSI's software permits to set thresholds between -5V..+5V.

The channel 0 on the screenshots of the software is for the sine wave and the channel 1 is the logical toggling.

[voltsandjolts]

And the manual says you can use negative thresholds down to -5V. Is that really true?

Yes, it is true. See the attached screenshots.
The FNIRSI's software permits to set thresholds between -5V..+5V.

I expect this is being done in a similar way to the Kingst threshold adjustment - see sheet 6 and 7 of schematic linked below. It uses the fixed input threshold of the fpga and offsets the input signal appropriately.

https://sigrok.org/wimg/2/26/Kingst_LA2016_LA1016_Schematic.zip
https://sigrok.org/wiki/Kingst_LA2016

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The PCB has U38 128Mbit FLASH which is likely holding the fpga bitstream which is loaded to the fpga at power-on.

It could be. I dumped the flash (see the attached zip file).