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Rigol HDO1000 and HDO4000 12bit oscilloscopes launched in China
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core:
Indeed, noise level is very low.

1mV/div, 2 channels, 50 Ohm terminators on inputs, BW 20MHz / 200MHz, memory auto / max.
For me ch 1 have the highest bias, and ch 4 the lowest.

Also, some pictures for StairUp signal, 6mVpp, 1MHz. Acquisition normal, HiRes 14 bit (50MHz BW), HiRes 16 bit (BW 25MHz).
Generator SDG2042X.
ebastler:

--- Quote from: core on December 06, 2023, 05:49:40 pm ---Also, some pictures for StairUp signal, 6mVpp, 1MHz. Acquisition normal, HiRes 14 bit (50MHz BW), HiRes 16 bit (BW 25MHz).
Generator SDG2042X.

--- End quote ---

So the reduced bandwidth in 14 and 16 bit mode is independent of the sampling rate? The 50 and 25 MHz you state for your data, taken at 2 GSa/s, are the same as what ZhuraYuk quoted, for measurements taken at only 50 MSa/s.

I would have thought that they need to reduce the bandwidth if the base sampling rate is already low, to account for the averaging/interpolation/whatever needed to get the extra bits. But if you start with 2 GSa/s, shouldn't there be enough headroom to get higher resolution without sacrificing bandwidth right away?
core:

--- Quote from: ebastler on December 06, 2023, 06:09:53 pm ---
--- Quote from: core on December 06, 2023, 05:49:40 pm ---Also, some pictures for StairUp signal, 6mVpp, 1MHz. Acquisition normal, HiRes 14 bit (50MHz BW), HiRes 16 bit (BW 25MHz).
Generator SDG2042X.

--- End quote ---

So the reduced bandwidth in 14 and 16 bit mode is independent of the sampling rate? The 50 and 25 MHz you state for your data, taken at 2 GSa/s, are the same as what ZhuraYuk quoted, for measurements taken at only 50 MSa/s.

I would have thought that they need to reduce the bandwidth if the base sampling rate is already low, to account for the averaging/interpolation/whatever needed to get the extra bits. But if you start with 2 GSa/s, shouldn't there be enough headroom to get higher resolution without sacrificing bandwidth right away?

--- End quote ---

I've checked. There are the BW vs Sample rate :

2GSa/s : 14bit/50MHz; 16bit 25MHz
1GSa/s : 14bit/25MHz; 16bit 12.5MHz
500MSa/s :  14bit/12.5MHz; 16bit 6.25MHz

... and so on

Later edit : for 50MSa/s I have 14bit/1.25MHz, 16bit/625kHz. So I believe it was a typo / copy-paste error.
ZhuraYuk:

--- Quote from: core on December 06, 2023, 05:49:40 pm ---Indeed, noise level is very low.

1mV/div, 2 channels, 50 Ohm terminators on inputs, BW 20MHz / 200MHz, memory auto / max.
For me ch 1 have the highest bias, and ch 4 the lowest.

Also, some pictures for StairUp signal, 6mVpp, 1MHz. Acquisition normal, HiRes 14 bit (50MHz BW), HiRes 16 bit (BW 25MHz).
Generator SDG2042X.

--- End quote ---

Looks like the noise floor is different depending on the model. I have 23uVrms in mine DHO1072 vs 17uVrms in your DHO1074. Or mine is faulty.
Need more people with DHO1072 to compare the results
ebastler:

--- Quote from: core on December 06, 2023, 06:24:41 pm ---I've checked. There are the BW vs Sample rate :

2GSa/s : 14bit/50MHz; 16bit 25MHz
1GSa/s : 14bit/25MHz; 16bit 12.5MHz
500MSa/s :  14bit/12.5MHz; 16bit 6.25MHz

... and so on

Later edit : for 50MSa/s I have 14bit/1.25MHz, 16bit/625kHz. So I believe it was a typo / copy-paste error.

--- End quote ---

Ah, thanks! That makes a bit more sense. Although the initial bandwidth reduction to get to 14 bits still seems "excessive", and the next step to 16 bits seems "too small" -- can't get an extra two bits by just halving the sample rate.

So maybe the bandwidth reduction it is not only driven by the sampling requirements, but the scope low-pass filters the signal to reduce the noise in sync with the gain in resolution? Are the bandwidths the same at any V/div setting, or do you possibly get more bandwidth at lower sensitivity settings?
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