Rigol HDO1000 and HDO4000 12bit oscilloscopes launched in China

[Martin72]

BTW, there is a HDO4000 on the plane.

Ah, excellent..

[2N3055]

Just a general comment.

In, say, last half year, I was getting many invitations by Rigol for an online market research.. Stuff like ABC questions what would you prefer 12Bit 500MHz scope or 8Bit 1GHz scope. etc etc. These market research questions are usually weird because they are meant to be synthetic data points, and they make sense only after being combined together and analysed.
But it felt like they are doing soul searching, i.e. not having clear sense of direction. Like they really wanted to make a great new products but having no real understanding what that should be.

Jump to today, they released these two new products, and they feel and have featureset like they used that market research directly...  These 2 scopes read like they were literally designed by marketing. All the buzzwords are here:

- New chipset (Developed by RIGOL) - They are really giving this a lot of priority. Kudos to them for this.
- Very low noise (for cleaner signals, measuring small signals accurately... Yet to see the numbers before judging)
- 12 bit resolution (16 bit with hires so that number can also be put in datasheet).
- 500uV/div (still a software magnification, but improved one)
- Large Touch screen (they had that before, complaint was responsiveness not size)
- user friendly knobs (whatever that means)
- Deep memory (that is same or less than 8 bit devices from previous gen)
- UltraAcquire mode (meaning they couldn't make it fast so special limited acquisition mode was introduced)

Most of these are very vague with no details of implementation.
 
HDO1000 is not an alternative to MSO5000 in any way.
It looks good next to DS1000Z but at 3x the price.
It is max 100MHz scope with these sampling rates.

These two scopes feels like someone compiled the datasheet from all the buzzwords, erased all stuff that didn't sound cool and then gave that to engineering to make that. Which they dutifully did. Without any kind of purposefulness of the device.. If we look at the datasheet: it has 12 Bit so it is easy to test power.. It has 12 Bit so it is good for education.. It has large screen and Autoscale so that makes it good for embedded design (even without digital channels, and fact it has no longer memory than older devices that had large screen too). Like wise, it has CAN and LIN so it is good for automotive... Well it doesn't work that way...

To me, previous MSO5000/7000 and these two HDO1000/4000 in reality feel like prototype devices made for testing their chipsets more than device line with clear vision and purpose.
That being said, if we disregard noise debate, MSO5000/MSO7000 had quite well defined featureset. They had right set of features, just implementation was not perfect.  I hoped these new 12 bit scopes would be "fixed" MSO5000/7000, same featureset, better analog performance. New GUI looks much better to me though.

Their previous DS1000/2000/4000/6000 line also had clear purpose and was well defined product line. Right now, they have no scope I would buy.. Except maybe DS1000Z if I really needed cheap scope but wanted something that really works. Rest is all kind of confused..
I see a lot of effort, but weird confused devices.. I hope they get it together. I know they can do much better than this. They have the technology and know how in technical department, but they have to find sense of direction..

[2N3055]

How does a Saleae cost the same as an MSO5000?
Aaaand then I checked, and damn, yeah, close. The MSO5000 is a bit more with the LA probe option, but the MSO5000 base model is US$1090 and the Saleae Pro 16CH is $1399 

Yeah, I was pretty confused too..

BTW, there is a HDO4000 on the plane.

Excellente!!

[switchabl]

Yep. But the HDO4000 drops to 1Gs/s with all channels enabled and that isn't enough to support 800MHz bandwidth. And no digital channels. WTF is Rigol doing here? It will be another bug-fest anyway for the foreseable future so 'meh'.

I am going to give them the benefit of the doubt for now and assume that they limit the bandwidth sufficiently when all channels are active. With a custom ADC design it is entirely possible that they are oversampling and decimating internally anyway. 12 bits at 4 GSa/s will take up a lot of silicon, even setting aside the NRE costs that is going to be an expensive chip. So not surprising that they are trying to get away with just one. Still, the fact that there doesn't even seem to be a footnote about this in the datasheet is a lot less excusable.

Yet because SDS1204X-E uses twin 1 GSa/s ADC's we can still obtain 5x oversampling with 2 active channels and maintain the magic 2.5 with all channels active to rated frequency therefore inviting neither Nyquist or Murphy to the party. 

Well, from the link it looks like with all channels active the attenuation at f_s/2 (at 250 MHz) is a bit less than 3dB. That's not exactly an effective anti-aliasing filter.  At 1 GSa/s things are looking better with ~20dB stopband rejection which I guess is acceptable at the price point, even though for an 8 bit system you would ideally like to see > 40dB.

[mawyatt]

The new "Chip Set" developed by Rigol is likely not silicon designed by Rigol but commissioned out to a 3rd party fabless design house that specializes in this sort of IP design effort. The design folks capable of this sort of effort and performance likely aren't going to be employed by Rigol or Siglent, maybe at Keysight and LeCroy tho. The simple reason is they are too expensive (valued at over $1/2M per year when we were involved before retiring ~5 years ago) unless kept fully employed ~100% designing such, and the tool cost is enormous, just look at the cost of Cadence and other tools on a per seat per year basis!!! The NRE for this custom chip set design is going to be/was very high, so they must be "banking" on selling lots of these chip sets, otherwise the NRE investment makes no sense.


Let's hope Rigol gets a little better performing custom 12 bit chip set than their previous 8 bit attempt, and the new input stage doesn't degrade the ADC very much. The ADC is the best you can do, and everything in front of it degrades overall performance, so getting a high performance ADC is paramount and then not degrading it is the next major task!!

Anyway, a interesting new DSO is arriving and hopefully taking advantage of the new small feature CMOS with a custom chip effort!!

Best,

[tomud]

They have the technology and know how in technical department, but they have to find sense of direction..

Good point. I also think Rigol got lost a bit. It's a pity because since buying the DS1054Z I have been a bit attached to them, and now I have switched to Siglenta's equipment, which I think is a bit better thought out.

[switchabl]

The new "Chip Set" developed by Rigol is likely not silicon designed by Rigol but commissioned out to a 3rd party fabless design house that specializes in this sort of IP design effort. The design folks capable of this sort of effort and performance likely aren't going to be employed by Rigol or Siglent, maybe at Keysight and LeCroy tho. The simple reason is they are too expensive (valued at over $1/2M per year when we were involved before retiring ~5 years ago) unless kept fully employed ~100% designing such, and the tool cost is enormous, just look at the cost of Cadence and other tools on a per seat per year basis!!! The NRE for this custom chip set design is going to be/was very high, so they must be "banking" on selling lots of these chip sets, otherwise the NRE investment makes no sense.

If we were talking about a similar-sized western company, I'd say that probably makes sense. But I know very little about how the Chinese T&M industry operates.  I would expect the Chinese state to push for (and probably fund) the domestic development of high-end test equipment. If Rigol manage to break even by selling a lot of cheap scopes to international customers they probably won't mind. But surely the strategic goal has to be rolling their own mmWave stuff, even if it is not strictly viable from a purely commercial perspective. What's more, oscillscopes aren't really the only application that comes to mind when we talk about high-resolution, high-speed ADCs. That technology is very much "dual-use".

[Fungus]

New GUI looks much better to me though.

The sales brochure says it's Android based, that implies a complete rewrite of the UI.

Maybe that's why the MSO5000 hasn't had many updates lately.

[Fungus]

The new "Chip Set" developed by Rigol is likely not silicon designed by Rigol but commissioned out to a 3rd party fabless design house that specializes in this sort of IP design effort. The design folks capable of this sort of effort and performance likely aren't going to be employed by Rigol or Siglent

Why not? Rigol has money. It seems like all their focus has been on "ASIC" since the DS1054Z was launched. The first one wasn't quite there in terms of noise but they seem to have taken that to heart with this one.

ASICs are very expensive to develop but dirt cheap to mass produce afterwards. If they can get a good ASIC into the market then they have a chance of owning it for many years.

AFIAK Siglent hasn't tried an ASIC design yet.

[mawyatt]

The new "Chip Set" developed by Rigol is likely not silicon designed by Rigol but commissioned out to a 3rd party fabless design house that specializes in this sort of IP design effort. The design folks capable of this sort of effort and performance likely aren't going to be employed by Rigol or Siglent

Why not? Rigol has money. It seems like all their focus has been on "ASIC" since the DS1054Z was launched. The first one wasn't quite there in terms of noise but they seem to have taken that to heart with this one.

ASICs are very expensive to develop but dirt cheap to mass produce afterwards. If they can get a good ASIC into the market then they have a chance of owning it for many years.

AFIAK Siglent hasn't tried an ASIC design yet.

The answer is simple, they likely don't have the specialized skilled folks that are capable of developing chips like these. This is not programming an FPGA then a custom digital chip to render such after all the bugs are worked out, but a highly specialized and extremely demanding discipline. The folks that can actually develop this type of high performance silicon have a long career doing such and likely learned from others during their career. Few instrument companies outside Keysight, Tektronix and LeCroy have such a long history of developing this sort of talent and IP chip sets. Other companies that specialized in developing this type high performance silicon IP such as Analog Devices, LT and TI also have a long history in this specialized field, which creates opportunities within for extremely bright youngsters to learn from the masters of this technology, and the tide rolls on.

A few smaller specialized fabless silicon IP companies offer design services for this type of development and if you dig deep you'll find a highly specialized engineering core/gurus with a long history of such and likely originated with some of those companies already mentioned. It's not like a come along John or Jane Doe is going to successfully roll one of these chips, they'll need extensive long term guidance/tutoring before they'll be allowed to design and risk a multi-million $ chip, otherwise you'll just end up with a massive NRE cost and nothing workable to show.

Many companies, even large ones, thought they could get into advanced mixed signal high speed/analogish chip design, many tried and few succeeded. This was the very reason our small research company got acquired by a larger firm back in 2006, they realized the long term cost and time it would take to develop custom SOTA silicon chips and they already had a fab and GaAs design group beforehand.

BTW if think we're joking, just take a look at the Cadence, Mentor and Synopsis CAD tool cost, then check out just the mask set cost at TSMC, GF or Samsung for a leading CMOS process....staggering indeed!!

Anyway, the message is this is not trivial pursuit but a very involved and expensive venture. So hat's off to Rigol for coming thru with another custom chip development, even if it was purchased IP.

Best,

[Fungus]

The answer is simple, they likely don't have the specialized skilled folks that are capable of developing chips like these.

That's pure speculation.

There are engineers in China. Rigol has money, they can hire people.

[Martin72]

They have the technology and know how in technical department, but they have to find sense of direction..

Or like I´ve said it for "years" (about the MSO5000), they made raw diamonds and forgot the polishing...

[mawyatt]

The answer is simple, they likely don't have the specialized skilled folks that are capable of developing chips like these.

That's pure speculation.

There are engineers in China. Rigol has money, they can hire people.

You seem to miss the point, this discipline requires more than being just an "Engineer". Kind of like saying; Well we have quite a few doctors over here, we'll just pay some more and call them Neurosurgeons

We happen to spend the later part of our career in this field and don't recall ever finding a China based mainland company capable of this sort of in-house design. They are quite good at many engineering disciplines but SOTA silicon IC design wasn't one at that time. Knew quite a few very talented Chinese IC designers here in the US, most at universities, and they had decided to stay here after they got their PhDs here.

Just look at the leading IEEE papers on advanced SOTA ADC designs, and you can guess what AD, TI, as well as KS and LeCroy are up too!! Also take look at the $ premium AD and TI get for their multiple GSPS 12 bit ADCs, these chips aren't that big but wow they are expensive!! Guess why? Yep, it's the massively expensive NRE for the development of these advanced chips, and these folks are the world leading experts of such and should be able to do this more cost effective than others since they already have developed the "secret sauce"!!

Would like to believe that Rigol has developed this type of talent in-house, would certainly light a fire under Siglent  , but seriously doubt such.

Best,

[nctnico]

I'm not into the precise details but I have the feeling Siglent is getting their ADCs from Lecroy or uses off-the-shelve parts and gets very good results with this strategy. IMHO Siglent is the company that has a leg up here compared to Rigol. I feel that Rigol's chip development has put Rigol behind instead of ahead; a bridge too far.

[Martin72]

It´s no secret/surprise, that siglent would benefit from the "partnership" with lecroy, IMHO the touchscreen series (2k+, 5k+, 6k A, 2KHD) is one of the results and it´s very possible they use parts from lecroy for them.
What the rest of your post concerns:
+1

[mawyatt]

Yeah that's another way of looking at Rigol's path. I'm sure if done in-house totally, or farmed out for the core ADC IP, or farmed out for the entire chip (set) IP, this cost some serious $ either way.....and took away some "to market" time!!

Agree Siglent has the advantage of leveraging LeCroy ADC IP, which they've shown with the new SDS2000 HD.

Anyway, any of the Rigol approaches likely cost some NRE $, while Siglent's approach leveraged off LeCroy IP investments.

Best,

[tonyget]

The new "Chip Set" developed by Rigol is likely not silicon designed by Rigol but commissioned out to a 3rd party fabless design house that specializes in this sort of IP design effort. The design folks capable of this sort of effort and performance likely aren't going to be employed by Rigol or Siglent, maybe at Keysight and LeCroy tho. The

If Rigol indeed outsource chip design work to folks who are at Keysight/LeCroy level，then Rigol would have closed gap with Keysight/LeCroy already. But they didn't，there is still a huge gap between them. So I think Rigol have their own design team to do the work，and performance of the chip still lag far behind the likes of Keysight/LeCroy，precisely because their engineers lack experience in designing these kind of specialized chips.

[switchabl]

Agree Siglent has the advantage of leveraging LeCroy ADC IP, which they've shown with the new SDS2000 HD.

I am pretty sure Siglent is using an off-the-shelf (TI/National) ADC. And I doubt Lecroy is willing to share their ADC IP. That's the thing though, if the goal is to compete in the high-end segment eventually, that road leads nowhere. AFAIK you can't just buy 64 GSa/s ADCs. That's not saying Rigol is necessary going to succeed there but if that is the plan then I guess it makes sense.

[Martin72]

Thinking further about nicos last post, some things are now making sense to me.
The MSO 5000 for example.
Soon my verdict was, it got a lot of horsepower but didn´t get them on the road.
Full packed with tons of features, deep memory, 8GSa/s max, 2-Ch awg, and so on and so on.
Now over 3yrs are gone and this model seems still to me as it was a kind of prototype.
Same with the 7000.
It seems they (rigol) are so busy with developing hardware, that there are no capabilities for design ( ), Software, UI...
Therefore I´m very curious about the HDO4000 (Lecroy already got this name..), not for the HDO1000.

[thm_w]

And I keep repeating that PC based protocol analysers (popular USB types) are very good if you are debugging content of datagrams, i.e. debugging software side.

Triggering and measuring, signal integrity and precise timing correlation needs MSO. That is their whole reason for existence. Triggering on protocols (or anything else) is superb on even cheapest scopes compared to what most USB protocol analysers have.

If you are only working the software protocol stack on a hardware that is verified working on hardware side, yes, then USB protocol analyser is best tool by far...
If you are verifying timing and message content in relation to some real world event, then MSO...

And to repeat, popular Saleae USB devices that cost as much as MSO5000 have just basic level+simple digital combine trigger. They can't even trigger on a simple message..

MSO is useful. Very.

Yes, and software side is where most of the work is done, for beginners and those with low end scopes, IMO.
DSlogic has multichannel and serial data trigger, trigger out that can be tied to a scope. Don't really care what Saleae has as they are overpriced.

At no point did I say MSO is not useful.

Those are not really an option if you want to debug a mixed signal system with your mixed signal oscilloscope. For example ADC settling times. Or an RS485 transceiver. You can connect TX, RX , D and just one of the differential signals to a 4 channel scope. Or any interface, which uses higher voltages than those USB thingies can accept. Or anything with ECL logic. Or an Ethernet interface. Or an NFC communication, which can be debugged even with a low end Keysight scope. Probably we could come up with another 50 use cases where an MSO is needed.

I think there is some confusion here as I'm agreeing with you that a 4 channel scope is "good enough" for most cases, and the LA extension isn't needed on that scope for the majority of people.
Anyway, do low end scopes even support NFC and ethernet decoding?

[EEVblog]

It´s no secret/surprise, that siglent would benefit from the "partnership" with lecroy

Keysight hugely regretted their technical partnership Rigol 

[thm_w]

If Rigol indeed outsource chip design work to folks who are at Keysight/LeCroy level，then Rigol would have closed gap with Keysight/LeCroy already. But they didn't，there is still a huge gap between them. So I think Rigol have their own design team to do the work，and performance of the chip still lag far behind the likes of Keysight/LeCroy，precisely because their engineers lack experience in designing these kind of specialized chips.

https://jobs.51job.com/all/coCWhcOl80VGoGZQFhVTI.html

Digital Integrated Engineer (Shanghai)
Digital Verification Engineer (Shanghai)
FPGA Engineer (Beijing)
RF IC Engineer (Suzhou)
Analog IC Engineer (Beijing)
Chip Test Engineer (Suzhou)
Semiconductor Equipment Engineer (Suzhou)

Support ASIC design and implementation of digital circuits such as signal processing, data interface and control algorithm

Must have some development in house yeah.

[nctnico]

It´s no secret/surprise, that siglent would benefit from the "partnership" with lecroy

Keysight hugely regretted their technical partnership Rigol 

But is Lecroy happy with partnering with Siglent? It would not surprise me if Siglent buys Lecroy just to get their high-end market share. Siglent likely dumps all Lecroy designed hardware when that happens though.

[mawyatt]

The new "Chip Set" developed by Rigol is likely not silicon designed by Rigol but commissioned out to a 3rd party fabless design house that specializes in this sort of IP design effort. The design folks capable of this sort of effort and performance likely aren't going to be employed by Rigol or Siglent, maybe at Keysight and LeCroy tho. The

If Rigol indeed outsource chip design work to folks who are at Keysight/LeCroy level，then Rigol would have closed gap with Keysight/LeCroy already. But they didn't，there is still a huge gap between them. So I think Rigol have their own design team to do the work，and performance of the chip still lag far behind the likes of Keysight/LeCroy，precisely because their engineers lack experience in designing these kind of specialized chips.

Not saying there are design houses that can produce the SOTA efforts in High Speed ADC design like Keysight or LeCroy, and certainly KS and LeCroy would not commit their top in-house ADC design resources to Rigol or anyone else, these teams are the Crown Jewels within the company. The available 3rd party design houses available when we were still involved were well below the capabilities of these KS and LeCroy teams which have had a very long history of working successfully together in this area. They were and likely still are right up there with the advanced AD and TI design teams, very specialized and technacially demanding fields.

If Rigol did actually do the 1st chip set design in-house without any outside help or guidance, they certainly did a very credible job!! Would not wager any $ on that serenio tho!!

Anyway, will be very interesting to see the actual performance & design of this new DSO when Dave has a chance to do his review and teardown.

Best,

[Someone]

The answer is simple, they likely don't have the specialized skilled folks that are capable of developing chips like these.

That's pure speculation.

There are engineers in China. Rigol has money, they can hire people.

You seem to miss the point, this discipline requires more than being just an "Engineer". Kind of like saying; Well we have quite a few doctors over here, we'll just pay some more and call them Neurosurgeons

We happen to spend the later part of our career in this field and don't recall ever finding a China based mainland company capable of this sort of in-house design.

While the knowledge is old/slow, the people and companies move/reorganise quite quickly.

There is an adjacent volume (profitable) market in CMOS image sensors, which china now has fully domestic capability end to end. It wouldn't be difficult to imagine the industrial/military businesses working with those same design houses to come up with GS/s ADC. A few iterations and they'll catch up, and those iterations are likely to come much quicker than the ASIC lifecycle of say HP/Agilent/Keysight.