Author Topic: RPL1116 (MSO1000Z) and PLA2216 (MSO5000) Active Logic Probe teardown  (Read 20456 times)

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Offline thmjpr

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Can confirm the noise, even with the Logic analyzer completely disconnected, some channels seem to have injected noise and go wild. Wonder if a high value (100k) pull-down on the connector board would help to get rid of that. Seems odd that Rigol would leave it high-z.

Also confirm the original pinout of the connector has many signals flipped (D1, D3, D5, D7, D9, D13, D14, D15), see attached for what it should be. On mine, dumb luck meant I flipped one of the pinouts of the LM7324, so I only have these flipped: D3, D7, D14, D15. I'll think if I want to mod the main board or the pods to fix this.. Once I've done some high speed testing, can send out USBC boards if anyone wants the extras (knowing that you have to do some mods).

Noticed that 2V5 seems to get pulled down a fair bit, with just one pod connected I was reading 2.2V. Not sure what the wire gauge in my USB cables is.
Also if it wasn't clear (because I didn't realize this), the Vref is: -1.5 to +1.5 to represent a -15 to +15V trigger level. How I have it now, the STM32 can only read positive trigger voltages (0 to 1.5V).
 

Online Rerouter

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100% certain on D11 and D14? they break the pattern of all the others
 

Offline TK

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Can confirm the noise, even with the Logic analyzer completely disconnected
By completely disconnected you mean the minimum required for the Scope to detected and activate the logic analyzer, correct?  The microcontroller that was added for the LEDs, is it active when you detect the noise?
 

Offline thmjpr

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See attached for 40MHz SPI signal on analog + logic input, seems to work quite well other than a bit of jitter.
One issue is there is a ~150ns offset between the analog channels at the top, and the same digital channel on the bottom. I'm thinking this is worth reporting as a bug.
One possible workaround for this would be adjusting the analog channel offsets, so all are -150ns. But that is a lot so it may not be possible.. will check.

Temperature is 55C on the chip and 45C on the bottom of the board (in open air at 23C). It will get a bit worse inside the case, but would likely be fine without a heatsink.

By completely disconnected you mean the minimum required for the Scope to detected and activate the logic analyzer, correct?  The microcontroller that was added for the LEDs, is it active when you detect the noise?

Yeah thats right, nothing connected to the Rigols 50-pin port at all. Sometimes the LA will run for a bit, even after unplugging the pod (some bug or timing detection). But you can manually short pin 1 to ground too, to enable the LA and test this way as well. I suppose in Rigols design case it doesn't matter, as you either have all channels connected, driving the inputs hard, or not connected and LA disabled on the screen.
Good point about the micro though, I could see it having some effect.

100% certain on D11 and D14? they break the pattern of all the others

It is an odd pattern, and it would make more sense if it was N, P, N, P repeating consistently. Actually now that you mention it, the bit order does have a "logical" pattern: if you skip two pins, it does go from D0, D1 .. to D7, and the same for D8 to D15. At first I thought it was completely nonsensical.

I will go over them again tomorrow now that I've modified my pod to swap D4 and verify the pinout (having the resistor pack made it easier, see photo below).
« Last Edit: May 22, 2019, 05:43:35 am by thmjpr »
 

Offline thmjpr

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With the pod now having D1 and D3 flipped, the signals D11 and D14 are still backwards. So they don't match the pattern seen on the other signals. To eliminate all possible sources of error it could be checked manually at the input pins.

Digital to analog delay cant be adjusted with ch-ch skew adjustment. This only delays the analog channel further forward on the x-axis (+/-150ns max). Maybe someone with the official logic pod can verify they see this digital-> analog delay as well. Adding a fixed offset in firmware would be nice, an adjustable offset in the menu even better still.

Channel to channel jitter is OK, I will get a shift back and forth of 1ns on D3, D2, D1 when triggering on D0 for example. Rigol spec is 2ns typical, 5ns maximum. Sample rate is 1GS/s at 200MHz, which all adds up.

Going to print the pod case again, font was too small to show up. Clear color would be cool too, to see the LED inside.
Adapter case coming soon.
 

Online Rerouter

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Does the Channel - Channel skew line up with your trace lengths, if not we may be able to forward correct for it on a new PCB version.
 

Offline thmjpr

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Does the Channel - Channel skew line up with your trace lengths, if not we may be able to forward correct for it on a new PCB version.

The trace lengths were matched to under 1cm or so, speed of signal in FR4 is ~15cm/ns, so 70ps. I can't see it making too much difference, its well under their specifications. The skews sort of just jump around, if I averaged a bunch of captures then I might see the relationship you are referring to.

If we wanted to extend the traces to make up for the 150ns LA->analog delay in the scope, we are talking about 22m of trace! So I'm sure the official Rigol pod does not line up with the analog channels either.

I originally had the case try to duck under the cutout in the rigol scope, but it didn't quite fit. So pulled it forward to be in front instead. The OLED module sits inside that top bezel part.
If you don't need a screen (its not as necessary as I thought because the idle signals will be clearly inverted if the cable is upside down), then removing that top makes it a simpler design.
« Last Edit: May 28, 2019, 06:07:59 am by thmjpr »
 

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Ah sorry, misread, though it was digital - Digital skew, I would assume the rigol would have a setting somewhere to adjust digital skew.
 

Offline TK

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Re: RPL1116 (MSO1000Z) and PLA2216 (MSO5000) Active Logic Probe teardown
« Reply #183 on: June 07, 2019, 04:09:16 pm »
Today I noticed the LA can be activated without the digital probe connected (I don't have one).  What is the purpose of the probe detect on pin 1?

I don't have any noise in the digital channels when the LA is active and there is no probe connected to the scope
 

Offline thm_w

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Re: RPL1116 (MSO1000Z) and PLA2216 (MSO5000) Active Logic Probe teardown
« Reply #184 on: June 07, 2019, 10:06:44 pm »
Today I noticed the LA can be activated without the digital probe connected (I don't have one).  What is the purpose of the probe detect on pin 1?

I don't have any noise in the digital channels when the LA is active and there is no probe connected to the scope

You get to adjust LA settings and see what is in the menus with nothing connected which is OK. But yeah the software should probably auto-disable the channels from showing up on screen.

The noise will appear as soon as you short pin 1 and 2 together. So the probe detect pin is enabling buffers/inputs, might save some power and reduce noise, assuming its a hardware disable. The calibration menu option is also disabled.
 

Offline John_Cavanaugh

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Re: RPL1116 (MSO1000Z) and PLA2216 (MSO5000) Active Logic Probe teardown
« Reply #185 on: June 20, 2019, 04:50:50 am »
Any thought on using mini displayport for cables?   They have orientation and same lanes as hdmi.

Cables are pretty cheap.   https://smile.amazon.com/Cable-Matters-Mini-DisplayPort-Black/dp/B0777RKTJB/ref=sr_1_8

But I didnt check on the connector prices.    I suspect the usb-c are much cheaper...
 

Offline thmjpr

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Re: RPL1116 (MSO1000Z) and PLA2216 (MSO5000) Active Logic Probe teardown
« Reply #186 on: June 24, 2019, 01:20:53 am »
Added code for stm32 here: https://gitlab.com/thmjpr/stm32f03_la_monitor
Will show cable status ("A: -" means A cable not connected, etc.) and the two threshold voltages (0 to +15V).

I have one partial built usbc main board and un-built PCBs if anyone is interested. 3D printing is possible but would cost more for shipping.

BTW there is a SCPI command for LA time offset, :LA:TCALibrate 0.0000002 +/- 200ns but its not working (read back is always 0), suspect in another thread that its not actually been implemented yet.

Any thought on using mini displayport for cables?   They have orientation and same lanes as hdmi.
Cables are pretty cheap.   https://smile.amazon.com/Cable-Matters-Mini-DisplayPort-Black/dp/B0777RKTJB/ref=sr_1_8
But I didnt check on the connector prices.    I suspect the usb-c are much cheaper...

That would be a good choice. Its also possible to mix it up with mini->normal size cables as those are more common, but $9 is great already and seems robust. Connectors, I see two on digikey for $2-3 each:

https://www.digikey.ca/product-detail/en/te-connectivity-amp-connectors/2129320-3/A120537CT-ND/5021748
https://www.digikey.ca/product-detail/en/pulse-electronics-network/E9320-001-01/553-3756-1-ND/4169580
« Last Edit: June 24, 2019, 01:51:42 am by thmjpr »
 

Offline jMachina

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Re: RPL1116 (MSO1000Z) and PLA2216 (MSO5000) Active Logic Probe teardown
« Reply #187 on: August 08, 2019, 10:45:53 pm »
Wow, I am so glad that I just made this account! Would you be willing to share design files and firmware so I can make a run of PCBs?

Thank you kindly,
jMachina
 

Offline thmjpr

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Re: RPL1116 (MSO1000Z) and PLA2216 (MSO5000) Active Logic Probe teardown
« Reply #188 on: August 09, 2019, 05:13:30 am »
Wow, I am so glad that I just made this account! Would you be willing to share design files and firmware so I can make a run of PCBs?

Thank you kindly,
jMachina

Thats great. I've added files for revision 1 board here: https://gitlab.com/thmjpr/stm32f03_la_monitor/tree/master/PCB_Rev1

As mentioned in PM, I would recommend going with that and modding the pod PCBs, or getting me to do it. That way you'd have 14 usable channels out of 16, then two inverted. Shipping the extra boards is not expensive. But if you want to wait for Rev2 files that is OK.
« Last Edit: August 09, 2019, 05:15:11 am by thmjpr »
 

Offline thmjpr

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Re: RPL1116 (MSO1000Z) and PLA2216 (MSO5000) Active Logic Probe teardown
« Reply #189 on: September 03, 2019, 06:35:12 am »
Revision 2 PCB is here: https://gitlab.com/thmjpr/stm32f03_la_monitor/tree/master/PCB_Rev2

- See readme.md
- A 50 pin connector available from LCSC but has no polarized part in the middle, so could accidentally be plugged in upside down. One polarized version is: SFH11-PBPC-D25-ST-BK (digikey)
- CC1/2 resistor values might need to be played with or voltage measured, can't recall if I used what was on the schematic.

Attached some parts I bought from LCSC but its not the complete BOM, just use for sourcing ideas.
 
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Offline AngusBeef

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Re: RPL1116 (MSO1000Z) and PLA2216 (MSO5000) Active Logic Probe teardown
« Reply #190 on: September 06, 2019, 06:01:06 pm »
I'm a little uncertain reading through this thread - does the logic analyzer you guys designed improve anything off the Rigol design, or is it simply a matter of reducing the $400 price tag off the Rigol product to BOM plus hobby time?
 

Offline spongle

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Re: RPL1116 (MSO1000Z) and PLA2216 (MSO5000) Active Logic Probe teardown
« Reply #191 on: September 06, 2019, 07:22:13 pm »
Revision 2 PCB is here: https://gitlab.com/thmjpr/stm32f03_la_monitor/tree/master/PCB_Rev2

- See readme.md
- A 50 pin connector available from LCSC but has no polarized part in the middle, so could accidentally be plugged in upside down. One polarized version is: SFH11-PBPC-D25-ST-BK (digikey)
- CC1/2 resistor values might need to be played with or voltage measured, can't recall if I used what was on the schematic.

Attached some parts I bought from LCSC but its not the complete BOM, just use for sourcing ideas.

This is fantastic, if you have any spare boards / parts you'd like to sell I'm interested.
 

Offline thmjpr

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Re: RPL1116 (MSO1000Z) and PLA2216 (MSO5000) Active Logic Probe teardown
« Reply #192 on: September 06, 2019, 09:40:49 pm »
I'm a little uncertain reading through this thread - does the logic analyzer you guys designed improve anything off the Rigol design, or is it simply a matter of reducing the $400 price tag off the Rigol product to BOM plus hobby time?

Its mostly reducing the price tag. There are some small improvements, like if you want a longer cable you could buy a different length USB-C cable.

This is fantastic, if you have any spare boards / parts you'd like to sell I'm interested.

I have 3x rev 1 bare boards, I don't plan on buying rev2. $4 for just PCBs in a bubble envelope, modding required. Will send a PM for the pre-made board price.
 

Offline whowe

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Re: RPL1116 (MSO1000Z) and PLA2216 (MSO5000) Active Logic Probe teardown
« Reply #193 on: September 21, 2019, 04:28:32 pm »
Hello thmjpr,
Is Rev2 like a "perfect" version so far?
Really love your USB-C idea. I'm thinking to make one and guess it can bring some fun time with my new MSO5072.
 

Offline tv84

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Re: RPL1116 (MSO1000Z) and PLA2216 (MSO5000) Active Logic Probe teardown
« Reply #194 on: September 21, 2019, 05:02:28 pm »
BTW there is a SCPI command for LA time offset, :LA:TCALibrate 0.0000002 +/- 200ns but its not working (read back is always 0), suspect in another thread that its not actually been implemented yet.

First of all, congratulations for your work!  :clap:

Now, my small contribution:

Those SCPI commands are implemented in the FW. I've checked them in the latest FW.  (and there are plenty of other functions that are not currently exposed to users, but equally implemented)

Don't know if you are aware of all the MSO5000 SCPI commands that are currently externally exposed? but maybe you have to manually enable "calibration mode". Try these commands:

:CALibration:ENTer
:CALibration:EXIT


I think Rigol has been using this type of protection in the latest equipments so that one doesn't execute unwanted calibrations. My guess...


Edit: These commands are only for the analog channels!  |O

Do you do a :LA:ACTive command before the calib to choose the specific digital channel before setting the delay?
« Last Edit: September 21, 2019, 05:33:14 pm by tv84 »
 

Offline thmjpr

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Re: RPL1116 (MSO1000Z) and PLA2216 (MSO5000) Active Logic Probe teardown
« Reply #195 on: September 23, 2019, 10:45:20 pm »
Hello thmjpr,
Is Rev2 like a "perfect" version so far?
Really love your USB-C idea. I'm thinking to make one and guess it can bring some fun time with my new MSO5072.

Thanks, the ideas are mostly combinations from others in this thread.

I haven't built V2 so I'm not sure, it will still measure only positive trigger voltages, and cable orientation resistors may need tweaking. AngusBeef has ordered boards so he will be the one to try it. Although sounds he will be busy with moving shortly, perhaps after that he will be able to sell the extra PCBs.

BTW there is a SCPI command for LA time offset, :LA:TCALibrate 0.0000002 +/- 200ns but its not working (read back is always 0), suspect in another thread that its not actually been implemented yet.
First of all, congratulations for your work!  :clap:
Now, my small contribution:
Those SCPI commands are implemented in the FW. I've checked them in the latest FW.  (and there are plenty of other functions that are not currently exposed to users, but equally implemented)

Don't know if you are aware of all the MSO5000 SCPI commands that are currently externally exposed? but maybe you have to manually enable "calibration mode". Try these commands:

:CALibration:ENTer
:CALibration:EXIT


I think Rigol has been using this type of protection in the latest equipments so that one doesn't execute unwanted calibrations. My guess...


Edit: These commands are only for the analog channels!  |O

Do you do a :LA:ACTive command before the calib to choose the specific digital channel before setting the delay?

Thank you, there is a LA threshold calibration as well but I'm not sure why that one doesn't work, it should be reading the voltage internally. Can't recall if we've heard from someone with the official probe if they can confirm. Anyway, it will just cal the trigger threshold voltages, so its not too critical, as they can be read out or manually adjusted if ever needed.

For ":LA:ACTive" command, that is the same as the LA -> Select option on the menu screen. So you can select none, D0, D1, etc. But I tried with either of those and still the LA:TCAL command does not save any offset data. What we want is an entire shift in time from all digital channels to all analog channels.
I could see individual channel adjustment being useful in some niche cases, but IMO its something left to very high end logic analyzers.
 

Offline AngusBeef

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Re: RPL1116 (MSO1000Z) and PLA2216 (MSO5000) Active Logic Probe teardown
« Reply #196 on: September 23, 2019, 11:08:48 pm »
I got one of the Rev2 logic pods done, I'm short a few caps that'll come on Wednesday so I can finish the other 3.

I will probably finish the rev2 main board tonight or tomorrow and so I *should* be able to test it on Wednesday assuming I track down any shorts or non-connected wires. I did the comparators with a cast iron skillet and my stove  :-/O and everything else with a soldering iron so I have run across several components I had to fix up already. I messed up one comparator which hurt my soul a lot.

I already have some boards I screwed up, but assuming all goes well in completing this, I should have 2 main boards and 7 logic pod boards left over. I'll be packing up my place in about 4 days but I'll have them available when I put stuff into storage in another state mid-October and then whatever is left is coming with me to Europe.

I really only started learning electronics about 3 months ago and focusing on it about a month ago, so this is my first 'real' circuit besides breadboarding with an Arduino so I'm just trying to keep my head above water here.

Edit: There could be something worthwhile with the LCSC assembly service seen here - I'm already committed to doing this project but someone else may want to check it out. - https://www.eevblog.com/forum/manufacture/jlcpcb-smt-assembly-service-208764/?topicseen
« Last Edit: September 23, 2019, 11:33:26 pm by AngusBeef »
 
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Offline AngusBeef

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Re: RPL1116 (MSO1000Z) and PLA2216 (MSO5000) Active Logic Probe teardown
« Reply #197 on: September 27, 2019, 12:44:19 am »
Got two logic pods and the main board done. With just the main board in the scope, I have a lot of noise as mentioned above. But when I plugged my pods in, they light up for a second and then turn back off. I think either I messed up all of my USB connections since I tried the majority of them, or the USB-C cable I have lying around is not a Gen-2 so it may not work correctly. I may get a chance between now and next week to take a peek, otherwise I'll probably get it running by mid-October.

One change I had to make was using an 1uF electrolytic cap for C11 because I must have already packed up my 1uF ceramic caps. I've got it in polarity correct ( :-BROKE) so my assumption was that it will work the same in this situation. Would love to hear some feedback whether or not it's true. From the schematic it looks like the STM32F030F4P6 and all the associated passives are for the OLED screen. Is it possible that they're causing issues if I don't have the screen hooked up yet?

I'll clean up the flux and upload a photo later when I get a chance.
 

Offline whowe

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Re: RPL1116 (MSO1000Z) and PLA2216 (MSO5000) Active Logic Probe teardown
« Reply #198 on: September 27, 2019, 02:09:25 pm »
I also have made a copy of your Rev2.
I planned to use JLC, but the verification girl insisted it's a "5-board" one and the price was almost 100 USD. I failed to correct her that it was "2 designs only" board. Finally I had to change to another vendor who does not understand impedance part.
Anyway, the board is being shipped to me now. And I also purchased 2 LMH7324 directly from TI (FedEx from Texas) which is expensive but should be genuine.

Hoping for the best result.
 
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Offline thmjpr

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Re: RPL1116 (MSO1000Z) and PLA2216 (MSO5000) Active Logic Probe teardown
« Reply #199 on: September 27, 2019, 09:31:40 pm »
Got two logic pods and the main board done. With just the main board in the scope, I have a lot of noise as mentioned above. But when I plugged my pods in, they light up for a second and then turn back off. I think either I messed up all of my USB connections since I tried the majority of them, or the USB-C cable I have lying around is not a Gen-2 so it may not work correctly. I may get a chance between now and next week to take a peek, otherwise I'll probably get it running by mid-October.

One change I had to make was using an 1uF electrolytic cap for C11 because I must have already packed up my 1uF ceramic caps. I've got it in polarity correct ( :-BROKE) so my assumption was that it will work the same in this situation. Would love to hear some feedback whether or not it's true. From the schematic it looks like the STM32F030F4P6 and all the associated passives are for the OLED screen. Is it possible that they're causing issues if I don't have the screen hooked up yet?

I'll clean up the flux and upload a photo later when I get a chance.

A random USB-C cable is unlikely to work, as most will not have all wires connected internally (passively). But you can check by plugging it in and beep out the connections if you want. I linked two specific alix vendors earlier in the thread.

Caps won't make a huge difference so should be fine for the moment.

STM32 is purely for the OLED display, if you don't use the display, don't need to populate it or supporting circuitry. It isn't connected to any of the differential signals, and the only connection to Vref0/1 is to monitor those voltages. So just 100 ohm resistors + fuses on the power supply rails would be needed if you want to operate the board passively.
 
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