Products > Test Equipment
R&S RTB2004 Snooping
skander36:
As I have different adapter i have used this script (thanks Trimen!) :
#source [find interface/jlink.cfg]
source [find interface/ftdi/xds100v3.cfg]
#source [find target/altera_fpgasoc.cfg]
adapter speed 5000
transport select jtag
reset_config trst_and_srst
# Altera cyclone V SoC family, 5Cxxx
#
if { [info exists CHIPNAME] } {
set _CHIPNAME $CHIPNAME
} else {
set _CHIPNAME fpgasoc
}
# CoreSight Debug Access Port
if { [info exists DAP_TAPID] } {
set _DAP_TAPID $DAP_TAPID
} else {
set _DAP_TAPID 0x4ba00477
}
jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x01 -irmask 0x0f \
-expected-id $_DAP_TAPID
# Subsidiary TAP: fpga
if { [info exists FPGA_TAPID] } {
set _FPGA_TAPID $FPGA_TAPID
} else {
set _FPGA_TAPID 0x02d020dd
}
#jtag newtap $_CHIPNAME.fpga tap -irlen 10 -ircapture 0x01 -irmask 0x3 -expected-id $_FPGA_TAPID
set _TARGETNAME1 $_CHIPNAME.cpu.0
#set _TARGETNAME2 $_CHIPNAME.cpu.1
# A9 core 0
dap create $_CHIPNAME.dap -chain-position $_CHIPNAME.cpu
target create $_TARGETNAME1 cortex_a -dap $_CHIPNAME.dap \
-coreid 0 -dbgbase 0x80110000
$_TARGETNAME1 configure -event reset-start { adapter speed 1000 }
$_TARGETNAME1 configure -event reset-assert-post "cycv_dbginit $_TARGETNAME1"
# A9 core 1
#target create $_TARGETNAME2 cortex_a -dap $_CHIPNAME.dap \
# -coreid 1 -dbgbase 0x80112000
#$_TARGETNAME2 configure -event reset-start { adapter speed 1000 }
#$_TARGETNAME2 configure -event reset-assert-post "cycv_dbginit $_TARGETNAME2"
proc cycv_dbginit {target} {
# General Cortex-A8/A9 debug initialisation
cortex_a dbginit
}
init; ftdi_set_signal PWR_RST 1; jtag arp_init
init
#jlink targetpower on
#targets
#targets $_CHIPNAME.cpu.1
#halt
#targets $_CHIPNAME.cpu.0
#halt
halt
targets
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