Products > Test Equipment
SainSmart DDS120 & DDS140 USB Oscilloscope
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doctormord:
Still thinking about interleaving the two channels. A non trivial task, as the half clock shift at the ADC only delays data out, not data in.

An half-clock-cycle-delay (HCCD) is needed while maintaining the original clock frequency.

For sure, we simply can inject some propagation delay by gatter-logic, but this won't be frequency stable, I guess.

Data reconstruction can then be done in software.

psynapse:
Doctormord, 

I am not sure I agree about the half clock shift not skewing sampling.  Here is the timing diagram for mode (S1/S2 1,1) from the datasheet

For me it shows that supplying antiphase clocks to the two encode pins results in data sampled at double the clock rate (if the two inputs are tied together)

Compare it with the normal mode operation(S1/S2 1,0) (shown in the second attachment), which shows both channels being sampled once a clock period.

So the task would then involve spliting the two encode pins (lifting one leg) , feeding antiphase clocks to the two, swithching one of the mode pins between 1 and 0, and of course joining the two inputs together.

While it looks as though S1 is tied high on the DDS140 board , S2 is connected to a plated through hole.  The same is true of the DDS120.  I am not in front of the hardware tonight, have you traced S2?  Of course the two encode pins are strapped together and will need splitting apart

doctormord:
Now i see, was a bit confused because of the alignment.
mmark:
Psynapse,

it might be silly, but from looking at the image Jimon posted earlier, one could assume that Ch1 and 2 are already shifted by half a sample period at the 48/50 MHz sample rate... It would be interesting to see what signals you get if you connect a signal close to 50 MHz to both inputs.

Again, this is just an observation without any support from schematic or data sheets. Nevertheless I thought it might be interesting?!

mmark
doctormord:
Can't be, because both Channels get the same clock and data align is disabled by hardware.
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