Products > Test Equipment
SainSmart DDS120 & DDS140 USB Oscilloscope
ganzuul:
--- Quote from: psynapse on November 13, 2014, 12:55:18 pm ---I do have a functioning trigger in software (though only in my adaptation of Donut6 WX based code). It is based on generating the first differential of the input data (more simply the difference between current and previous input value) . By keeping track of the maximum of this value and where it occurs in the dataset you have a plot startpoint. To speed the process and to avoid late syncs which leave too little data to plot, I scan just the first 25% of the input in this way.
--- End quote ---
That is a very good way of doing it. You trigger on what equates to the highest instantaneous current that way.
In Jimon's screenshot it looks like there is a PIN diode on the clipped channel, as if a capacitance gets drained after the voltage overshoots. PIN diodes are more permissive of high frequencies though. It might be that the adjustable filters near the BNC connectors shunt higher frequencies to ground, and that they form an RCL network which also phase-shift the signal. If that is true then the channels can be matched by just looking at the oscillograph and adjusting the filters.
jimon:
@ganzuul
I don't have any generators here that I can use for calibration, so probably will skip screwing around inside of scope :-\
ganzuul:
No sweat. I'm looking into building a tunable oscillator from discrete components right now anyway. I specifically got this scope for the purpose of screwing around, so I'll report the results! ;D
doctormord:
My approach of a classic generator is shown here:
http://www.diyaudio.com/forums/showthread.php?t=261604
psynapse:
Well Doctormord is right about the ADC, the DDS120 and DDS140 (without modification) will do no phase shifting between their two inputs. However Ganzuuls observation is an interesting one. I have not looked at the analogue front end too much ..... Doctormord and Ganzuul are certainly more hardware capable than me. The only thing I would note is that for the designers of these scopes, wouldnt it have been easier to use antiphase clocks to the ADC ..... Having a tuned circuit to adjust costs money!
BTW, Doctormord, I have done some calibration of the analogue front end .... and found what you already knew. Significant 0v offsets and appalling gain variability. Now that I have (software) corrected these I need to look at gain nonlinearities .... have you taken that subject further since you mentioned your concerns? And a quick question. I am proposing to buffer INT5 with an opto, collector tied to +3v with a 10k resistor. Do you see problems with that?
mmark, I agree that there is a phase shift, but I am not sure I see 180 degrees on Jimons post. Doctormord did a good job of tracing the front end here and here. His LTspice simulation shows that phase is all over the place up at the top end frequencies. Perhaps even limited differences in gain between the two channels could cause the observed shift.
Ganzuul and mmark. Yes, your observation on Jimons clipped channel. I have observed the same behaviour on one channel, but one only. Have not investigated further.
So all in all, good luck .... I am leaving this one to you guys (as the experts).
Once I have considered carefully how to implement a hardware trigger, that is next on my list. After that polish the interface ... oh and of course continuous data capture .... are we convinced that after the initial bad data, the scopes give data streams without dropouts (obviously excluding the DDS140 when it is in flash, ie normal, mode). I think both Doctormord and I are keen on decent data logging capabilities.
EDIT In starting to work out how to generate and receive an external trigger, I have looked closely at the DDS140 firmware. I note that the 50 command not only checks the status of the CPLD fifo, but also stops data acquisition by the CPLD (if the device has marked its FIFO as full). The only trouble is that the firmware resets the FX2 FIFO before it stop and resets the CPLD (and its FIFO) .... it is hence quite possible that the FX2 FIFO will be reloaded with additional data before a true stop. Note too that the "stop" to data acquisition is effectively up to the PC (through its polling with command 50), and all of the latency that involves. All of this says that there is very little surprise that there is floating data left for the next data acquisition cycle.
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