Products > Test Equipment
SainSmart DDS120 & DDS140 USB Oscilloscope
ganzuul:
--- Quote from: gambit58 on October 10, 2014, 04:11:03 am ---Hello
I just received the SainSmart DDS-120. The device drivers installed properly for Windows 7/64 Ult. When I run the scope software that is included I receive an error message (See attached). Suggestions for a fix?
Thank you
--- End quote ---
Does it show up in Device Manager? Did you try installing it on another PC?
psynapse:
Identical front end to the DDS120:- no, probably similar but a visual inspection between photos of the DDS120 and the DDS140 shows at least different component layout .... but in my DDS140 the A/D converter is identical to that in the DDS120 .... and hence incapable of 100Msps. The silk screening on the top is for an Analog Devices AD9288 BSTZ-40 , perhaps with a date code of 0732 (?!) and since it is not clear that AD use the BSTZ-40 designation, it might be a copy (photo)
Here is a photo of the insides of my DDS140, apologies for the added colours, I am trying to trace through to get an idea of how it works ..... Although I am so disgusted at being sold something that doesn't do what it says, that I have stopped for now .... send it back or not? And if I keep it, happy to collaborate .... to my mind the quickest way to get something working might be as part of sigrok, a cross platform community.
psynapse:
To all (but Ganzuul in particular)
Nice USB dumping utility:- if I read it correctly, its reading 64k bytes in 80mS? I need to look into that. But as you say, it will be important to read traffic in both directions.
Yes the A/D might be being overclocked, but I prefer your explanation of a copy which might be capable of that speed . IF I have read the date code correctly (ie 7 years old) then that seems more likely. The 80Mhz clock to the gate array I had presumed was divided by 2 (or another prescaler) before going to the AD, but it might be fed direct .... I really need a scope to find out ;)
Still would mean that the maximum sample rate is 80msps, but did I read somewhere that "they" use a slight of hand to call that 100msps. ie interpolation.
Your ideas on subsampling are very interesting and I will look into them as soon as I can advance a little in the hardware. I guess you are not keen on the sigrok approach .... could I ask why?
Postscript:
No meaningful dialogue with the supplier, simply a "contact Amazon for a return"
On the AD9288:- Overclocking (or use of forgery) of this part has been common for some time, see this post
http://www.eevblog.com/2009/04/05/full-review-of-the-rigol-ds1052e/
And the guys here in the " Rigol DS1052E " community are completely used to AD9288-40's being used at 100Mhz. Arguments still abound whether the chips are copies, selected samples or whether all 9288's work at 100Mhz with decreasing accuracy. Reading (the AD9288 datasheet) a little further myself, the top 5 bits are determined by a switched capacitor technique and the bottom three bits by a small (3 bit) flash convertor. This would mean that a 40Mhz part might well work well on the top 5 bits , but with increasing errors in the bottom three bits as sample rates increase. Quoted performance for the DDS140 is S/N 100:1 so errors in the bottom 1.5 bits is in specification.
So the long and short, I guess what I have is the "norm" and not a freak DDS140. I would love to know what others have inside their DDS140, assuming the courage of violating the meaningless "void if removed" sticker.
And when I get the time, I shall follow ganzuuls example and use Wireshark + USBPcap to get hold of the USB traffic. It will interesting to see what the differences are between DDS120 and 140 protocols.
psynapse:
Less of me! I have neither a DDS120 nor a Hantek6022be, but a visual of photos of the PCBs suggests that both are wired identically with respect to AtoD and the cypress chips, ie both have AD9288s wired to the same ports in the same way.... which leads to the questions,
has anybody more information on this similarity?
Has anybody had the courage to cross load firmware? (Since these devices are largely boot loaded from the host PC ????????).
The reason for this question is that the Hantek is being worked upon by the Open community ... and for Ganzuul there is some progress on the protocol exchange (see https://github.com/olerem/openhantek/commit/9a0d2747edc9306b1b56c04a4a9d491269023c76)
ganzuul:
That's brilliant!
The JTAG interface to the FPGA could prove very interesting. - I have spent the past few days learning about JTAG on an unrelated and now mostly finished project. I used a Parallax Propeller with a piece of software called the Jtagulator, by Joe Grand. It enumerates pin configurations, for UART too, and also does a boundary scan. You have to get the voltage level right but 3.3V is fortunately very common.
I'm quite unfamiliar with sigrok aside from recently encountering it in passing and adding it to me reading list.
The RF frontend is an unexplored mystery to me right now, but overclocking the DDS 120 definitely has to be tried.
1.5 bits of resolution translates to 9db. 39db left. Can be used for certain applications.
I'll definitely try cross-loading the firmware from the Hantek if I can obtain it! And also try my hand at analyzing the bytecode side-by-side since we have our binary from the DDS 120. Doc tried removing the pin which powers the EEPROM, and so did I after I knew he got his DDS 120 working again with the firmware. When the pin is removed the scope enumerates as a different USB device, and you can still load firmware directly into RAM with CyConsole.
This is gotting very interesting! =D
Do you think you could use CyConsole to get a copy of the firmware from the DDS 140? I'd very much like to try to spot differences, and do more cross-loading. =)
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