| Products > Test Equipment |
| SainSmart DDS120 & DDS140 USB Oscilloscope |
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| psynapse:
Again, filled with admiration. :-+ I have neither the courage nor the ability to do that. That Rdy0 line makes all the difference. And I see a couple of plated through holes that could be important. (but then I checked a photo of the back of the PCB, just one heavy track, so no you have found everything. Good news) Sorry thought you were using LTSPICE rather than multisim. Yes, I guess. increasing the value of all the external resistors will reduce the variability due to the internal resistance of the 4052. But as you say, it will hit the gain bandwidth problem....... But perhaps not...... we do not need to change the gain of the amplifier ..... the only problem might be the change in input/output impedence that will be needed. And to misquote you, me "I am firmware, not software". Happy to tinker around at that level, but I am old and never got to master OOPS! So I am hoping that with you at hardware (and clearly some software), me at firmware (with a bit of hardware and software), perhaps we could look to donut6 for the soft side .... But he has already said he is busy .... We all have lives! |
| doctormord:
Resoldered the IC and tried sigrok: http://sigrok.org/wiki/Main_Page There also is an open source firmware available - FX2LP mode. With the eeprom-jumper removed, the scope is running in devkit mode (Cypress standard) and just reads raw from the 2 ports via FIFO. Also simple control codes are implemented. (I think async fullspeed, so no IRQ) As you're the "firmware", here is my idea: - Sampling at max samplerate all the time - "timebase" just in software - implementing the controlcodes for the gainstage - done. :D I see some data coming in in Pulseview, the actual problem is, the ADC is getting no clock from the CYPRESS. (needs to be configured) Infos about firmware: http://sigrok.org/wiki/Fx2lafw Sourcecode of firmware: http://sigrok.org/download/source/sigrok-firmware-fx2lafw/ I further simulated some things of the gainstage with the right opamp models. Gain varies with frequency at frequencies >~8MHz. Changing the values at Q1 to 100R would help abit for this stage. GBW is varies with gainsetting as well. There definitely is some compensation needed. :o To minimize temp-/amplitude drift within the analog switches, the CD4052 may be changed to some 74HCxxxx. (With 1/10 of Ron) V(n004) is the output of Q1. LTSpice stuff is attached as well. |
| ganzuul:
In a desperate effort to keep up with you guys ( :-+ ) I soldered a wire to the resistor on the clock line and tried to read the clock ticks with my Propeller uC. The verbatim reading I get is a few 100 kHz under 13MHz, and by making a few other measurements I presume that the ADC is always actually running at XTAL/2. - If of course I have not made some grave oversight regarding the performance of my uC, which remains possible. I made a thread on the Parallax forums but suddenly the forum decided that a moderator needs to review my posts. Perhaps the reading I get is a result of aliasing. |
| donut6:
Here's some code for the DDS140 that may be useful for experiments. Good luck compiling. It may also destroy your device. This needs wxwidgets, libusb , ... Makefile -> --- Code: ---CXX := g++ CXXFLAGS := -O2 -g -DGL_GLEXT_PROTOTYPES -I./ scope.o: scope.cpp $(CXX) $(CXXFLAGS) `wx-config --cxxflags` -c scope.cpp -o scope.o scope: scope.o $(CXX) scope.o -o scope -lusb-1.0 -lGL -lGLU -lX11 `wx-config --libs --gl-libs` --- End code --- |
| psynapse:
Donut6, Many thanks for the code, I will look at it very shortly. Doctormord 1) Improving performance of the input stage. Putting temperature variability to one side for a minute, I think that this is the key curve for a CD4052 is shown at attachment I note two things. Running the device at a higher voltage reduces both resistance and non linearity. In principle, the higher supply voltage should not cause a problem in terms of analogue inputs/outputs, but the multiplexer select lines would need buffering. So that is the quality approach Secondly at 5V supply, and 0-1V operating range, linearity is not too terrible and resistance comes in at 400 ohms. This is the "do nothing" approach! On the firmware front, happy to give it a go .... but I guess I must buy a DDS120, which will need to be from next months pocket money! Implementing gain and timebase should not be the difficult part. The key part is of course reliable data transfer at maximum rate. I am guessing you are using Cyconsole to load up the FX2 with the other firmware and then re-enumerating? If we can get that path working it is going to save a lot of development time And a word of warning to all. As a proof of principal, I wanted to change exactly 1 bit in the default firmware of theDDS140 (The IFCONFIG bit that switches out of GPIF debug mode). Made the edit in cyconsole and re-enumerated. "Bad device". It took a long time comparing hex dumps to find out that cyconsole was systematically changing the contents of 20-3F in the eeprom when I rewrote my two bytes in a completely different part of the memory map D30,D31. I copied back by hand the damaged fields and all is working. My priority at the moment is to get the default firmware into an iic file (and find out how to generate an iic) before trying any further firmware mods, no matter how small. Ganzuul, if I am right that resistor is connected to IFCLK, which when driven by the FX2 can only take on values of 30 and 48Mhz. So I think your aliasing explanation is right, you have 48/4 |
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