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SDG2042X Timebase Calibration

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mawyatt:
I just calibrated the SDG2042X AWG 10MHz reference to the SSA3021X Plus 10MHz reference and found a simple way to quickly get very close initial calibration.

Instead of following the counter in the Timebase Calibrate section exactly, connect the external 10MHz reference to the counter input as required but also to a DSO input (High Z) C1. Now set the AWG to 10.000000MHz and connect to the other DSO input C2, trigger off either input and set DSO sweep time to 20ns/div.

Carefully adjust the DAC code in the Timebase Calibrate section until the two waveform are somewhat synched. Try and set the DAC so the random walk & drift between the waveforms has equal but opposite excursions, thus averaging out over a long time period.

I just did this and running the SDG2042X counter is showing a mean frequency error of ~0.002ppm while counting the SSA3021X 10MHz reference over the past ~ hour. Seems the SDG2042X Reference Oscillator is pretty good, of course much longer monitoring period is required :)

Best,

Johnny B Good:
 I came to the same solution when I was checking out the clock calibrate function a few days ago. The only difference being that I used my much modified FY6600-60M to provide the 10MHz reference (its internal 10MHz OCXO which drives a clock multiplier to create the 50MHz FPGA clock was frequency injection locked to my GPSDO reference).

 I agree with you on this method offering a more precise and speedy way to calibrate its internal clock reference as closely as is possible when said internal clock is merely a VCXO rather than as others have assumed, a VCTCXO. To my mind, there seems to be far too much warm up drift and instability for it to be a Temperature Compensated VCXO. Am I the only one who thinks this the case?

===========================================================================================
[EDIT 2020-10-28]

 The datasheet +/-2ppm 0 to 40 deg C specification suggests just a VCXO rather than a VCTCXO and there's no mention of a VCTCXO being installed which confirms my impression that it's just a VCXO rather than the VCTCXO that everyone else seems to have assumed.
===========================================================================================

 I used a cheap 50MHz 0.1ppm TCXO board for my first clock oscillator upgrade before moving onto an OCXO because the best calibration and stability I could wring out of that TCXO (with calibration trimmer) had been a mere 30ppb which the SDG2042X's internal 10MHz clock oscillator comes nowhere near to achieving.

 Of course, this difference may simply be down to my foresight in keeping it well away from the 60 deg hot spot the original ten cent smd XO had been placed in. I'd located it immediately above a small cooling fan I'd fitted into the base of the FY6600's case to not only act as an airflow deflector but also to make sure it never ran any hotter than 2 or 3 deg above room temperature.

 The 0.1ppm figure applied only to the 0 to 25 deg range, degrading to 0.2ppm in the 25 to 50 deg range so I wanted to keep it out of that higher temperature range despite the fact that most other cheap TCXOs claim an even worse degradation to 0.4 or 0.5 ppm at higher temperatures.

 Of course, I may just be observing the less than stellar performance typical of an smd VCTCXO when it's subjected to the higher and more variable temperatures when it's mounted directly onto a main circuit board carrying the heat load from the components which which comprise the bulk of a typical AWG. >:D [Belay that thought - it's only a VCXO.]

 Perhaps I've simply raised my expectations beyond what could reasonably be expected when the circuit layout has been compromised to keep manufacturing cost to a minimum. [Although that still remains true, in this case it's only a VCXO]  Luckily in this case, this isn't a deal breaker on account of the presence of an external clock reference option socket.

 Talking of which (external/internal reference clock control), it seems to me that it lacks a third option in its simple choice of "import external clock" and "export internal clock", namely, "use internal clock without exporting it to pollute a perfectly good GPSDO reference feed". Since, despite the sub standard internal clock reference, it can still be useful in the absence of a proper external reference for synchronising other test kit, having a separate option to enable or disable the export function in the original binary choice would be the most optimal way to control this rather than have it as a third option to toggle through. If you do have a proper external clock distribution, disable it, otherwise enable it.

 If the use of a high impedance input on such external clock reference input sockets is common practice (presumably to allow daisy-chaining the feed to other kit with a 50 ohm dummy load terminator at the far end of the line if the final bit of kit doesn't already have a term/thru switch as my FY6600 has), the current options mean you need to disconnect it from the line before switching back to the internal clock if you wish to avoid disruption to the rest of the kit relying upon an actual reference. Unfortunately, as things stand, that means you get an error message to inform you of the loss of the external clock reference and a disabling of signal output.

 However, that's just one small deficit out of a much larger deficit in the whole front panel UI. If Siglent ever get round to employing a proper UI developer to create a user friendly UI version, he'll find no shortage of problems to address. >:(

John

Performa01:

--- Quote from: Johnny B Good on October 28, 2020, 05:14:35 pm ---===========================================================================================
[EDIT 2020-10-28]

 The datasheet +/-2ppm 0 to 40 deg C specification suggests just a VCXO rather than a VCTCXO and there's no mention of a VCTCXO being installed which confirms my impression that it's just a VCXO rather than the VCTCXO that everyone else seems to have assumed.
===========================================================================================

--- End quote ---
So everyone else is wrong then?
Maybe everyone else have had bad luck when they tried to get a simple VCXO with better than +/-20 ppm stability...

2N3055:

--- Quote from: Performa01 on October 29, 2020, 01:15:31 pm ---
--- Quote from: Johnny B Good on October 28, 2020, 05:14:35 pm ---===========================================================================================
[EDIT 2020-10-28]

 The datasheet +/-2ppm 0 to 40 deg C specification suggests just a VCXO rather than a VCTCXO and there's no mention of a VCTCXO being installed which confirms my impression that it's just a VCXO rather than the VCTCXO that everyone else seems to have assumed.
===========================================================================================

--- End quote ---
So everyone else is wrong then?
Maybe everyone else have had bad luck when they tried to get a simple VCXO with better than +/-20 ppm stability...

--- End quote ---

I agree.

I would like to see source of non temp compensated VCXO that will have tempco of 100ppb per °K. And cheap too.

Of course it is VCTCXO.... Maybe not best or most expensive one, but VCTCXO nevertheless.

And AWG is not meant to be used as frequency reference. If absolute frequency is needed, you should get proper frequency reference and ref in devices when needed.

Johnny B Good:

--- Quote from: 2N3055 on October 29, 2020, 01:56:13 pm ---
--- Quote from: Performa01 on October 29, 2020, 01:15:31 pm ---
--- Quote from: Johnny B Good on October 28, 2020, 05:14:35 pm ---===========================================================================================
[EDIT 2020-10-28]

 The datasheet +/-2ppm 0 to 40 deg C specification suggests just a VCXO rather than a VCTCXO and there's no mention of a VCTCXO being installed which confirms my impression that it's just a VCXO rather than the VCTCXO that everyone else seems to have assumed.
===========================================================================================

--- End quote ---
So everyone else is wrong then?
Maybe everyone else have had bad luck when they tried to get a simple VCXO with better than +/-20 ppm stability...

--- End quote ---

I agree.

I would like to see source of non temp compensated VCXO that will have tempco of 100ppb per °K. And cheap too.

Of course it is VCTCXO.... Maybe not best or most expensive one, but VCTCXO nevertheless.

And AWG is not meant to be used as frequency reference. If absolute frequency is needed, you should get proper frequency reference and ref in devices when needed.

--- End quote ---

 Those responses from yourself and Performa01 are rather curious to say the least. For starters, where in the specification is there any mention of a VCTCXO? I've checked out both datasheet versions (the 2015 one and the current 2020 one) and can not see mention of a VCTCXO anywhere. I see mention by the marketing copy writers of a +/-1ppm figure for the initial accuracy (+/-5K of 297K) and a +/-2ppm figure over the range 273 to 313K followed by the spurious 1st year ageing of +/-1ppm and 10 year ageing of +/-3.5ppm figures - spurious on account of the DAC calibration facility to recalibrate such ageing effect completely out of the picture. Those copy writers sure were clutching at every straw they could find to pad out the specs with as many "facts and figures" as they could lay their hands on (as all competent marketing bullshitters are obliged to do to justify their salaries).

 Considering that the specifications have been carefully crafted to make them appear more impressive than they really are (RMS jitter values anyone?), it seems very unlikely that they would have overlooked an opportunity to boast of a VCTCXO, (not just once but twice!) when you consider the 700 quid price tag on a return to factory TCXO upgrade on the more upmarket Keysight AWGs (incidentally, over nine times what I'd paid for my FY6600-60M almost two years ago ::)).

 Other than positively identifying the XO chip actually soldered to the main board as being a VCTCXO type, I cannot see how anyone could conclude that the XO chip is anything more than a decent quality VCXO type. However, I did run some extensive comparison tests between my cheap 50MHz 0.1ppm XO clock module board and the output of the Siglent's internal clock reference which, rather unconscionably, is output onto the 10MHz reference socket by default when not running from an external reference clock.

 I set up my SDG2104X to trigger from the GPSDO reference on CH1 with a timebase setting of 10ns/div and used CH3 to display the 50MHz TCXO and CH4 to display the SDG2042X's 10MHz reference. After running several tests involving a small sheet of paper to temporarily block the fan intake to raise the internal temperature a few degrees in the SDG and a small usb powered desk fan to provide a modest cooling boost and using the same fan to cool the 50MHz board and one of those "Dust Grabbing" cloths as an insulating cover to similarly vary the 50MHz TCXO temperature, I powered the SDG and the 50MHz TCXO down for about half an hour or so to ready them for a start from stone cold warm up test.

 With everything ready including a stopwatch in hand, I fired up both signal sources and monitored the 50MHz TCXO's behaviour whilst waiting for the SDG to finish its 22 seconds boot up sequence and finally restore the DAC calibration voltage to its VCXO. The 50MHz starts off around 50ppb low for the first split second,  swiftly increasing frequency to within 4ppb after ten seconds or so to finally drift bang on frequency some 20 minutes later when, purely coincidentally, the Siglent's internal reference had also landed bang on frequency as it continued its upward drift.

 The Siglent had jumped to a frequency some 250ppb low once the DAC calibration voltage had been restored and then slowly drifted exactly onto frequency at the same moment the TXCO module had as mentioned above. from then on, the Siglent carried on slowly drifting upward in frequency, eventually to settle some 76ppb high an hour or two later, with the TCXO settling at just 3.7ppb low.

 These results simply confirmed my initial impression that the XO in the Siglent is simply just a VCXO that could be recalibrated through the UI to place it exactly on frequency and so allow it to vary through the whole of its specified +/-2ppm temperature range without violating the SDG2042X's frequency stability specification.

 I think this is just another demonstration of the power of marketing in manipulating the perceptions of potential buyers so that they infer some desirable feature that simply doesn't exist. In this case, the unusually tight frequency tolerance spec of the VCXO within +/-5 deg of the optimum 23 deg C operating environment temperature range and the slightly looser +/-2 deg spec over the much wider 0 to 40 deg C range suggesting to those more susceptible to such psychological warfare tactics (which has, annoyingly, included myself in times past  :palm:) that the VCXO in question could only be of the VCTCXO type.

 You only need a few mentions of the phrase "VCTCXO" in an SDG2000X topic thread and, before you know it, it has become "Common Knowledge" that Siglent are using such an XO chip in their SDG2000X product line. I'f I'm wrong in this matter, I'll humbly apologise but I rather doubt in all honesty, that I'll be needing to say sorry to anyone. The warm up frequency drift is completely contrary to what you'd see with a TCXO of any type.

 Incidentally, whilst searching the list of features for any mention of a VCTCXO, I noticed the rather irksome claim of it having a high precision frequency counter function built in (don't they all? ::)). At just 8 digits resolution, that might have rung true 2 or 3 decades ago but even the counter in my 'toy' Feeltech AWG can produce an 8 digit readout on its 1 second gate time setting which can be pushed to a 10 digit resolution if you have the patience to wait out the full 100 seconds gate time.

 Since I was somewhat curious about what it would make of the Siglent's "10MHz" clock, I waited it out to see a reading of 10,000,000.68Hz eventually materialise which had me re-timing ten passes of the drifting clock signal I'd previously measured at 13.2 seconds to calculate the 0.75757Hz offset I'd based my +76ppb figure upon. I was pleased to see a figure of 0.6896551Hz which closely matched the readout which alternates the last two digits between 68 and 69 (there's a 1 digit uncertainty in the final digit of this counter whatever the chosen gate time - in that regard, it's a little "Old Skool" in its behaviour).

 This is yet another example of marketing bullshit since, presumably to save immediate embarrassment at making such a claim, they neglected to mention just how many (or few) digits of resolution this "high precision" counter actually has at its disposal. As a prospective buyer (especially so for the hobbyist or small business buyer) it's important to not let any enthusiasm for the brand blindside you into failing to look your chosen Gift Horse very closely in the mouth and examine any unsubstantiated claims, implied or otherwise, very carefully before committing to a purchase you could later regret ever making.

 I've attached three screenshots to show the waveforms. The first two are with a 1 second persist to give some idea of the relative phase shift velocity of the 50MHz TCXO and the Siglent's 10MHz clock. The third is a reference 'snapshot' without any persistence.

John

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