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SDG6052X waveform memory size

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Performa01:

--- Quote from: TurboTom on October 29, 2024, 01:10:04 pm ---That's a good question. Since the SDG6000X series had been designed more than seven years ago when Siglent just moved to the Zynq SoC plaform on their (back then) most recent products, maybe they had little experience and designed the SDG6000X better "safe than sorry" with dedicated sample memory. Only later on they may have realized that a direct sample data transfer from SoC memory through the sample engine FPGA to the DAC works okay at 1.2GBytes/s (plus overhead) to meet their instrument's specs.

--- End quote ---
Finally you've got to the right conclusion.

In fact, that additional RAM has been a backup ("plan B") in case the direct data transfer won't be fast enough - which the HW engineers couldn't tell for sure before the prototype was functional. So, even though some early specimen (like the one sent to Shariar) had the RAM chips populated, they have never actually been used. As a consequence, they were "economized" early on.

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